IP2022 Users ManualPeripherals
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289
Figure 4-11 USB Interface Example
The SxMODE register must be programmed with values for a
recovered clock, and the PLL clock multiplier must be
programmed to generate the appropriate frequency. For example,
it can be programmed at 48 MHz for full speed with a divisor of
zero (=1). A divisor of 8 will make it suitable for low-speed
operation. The synchronization pattern must be programmed into
the SxRSYNC register to trigger an interrupt when a packet is
received.
PDIUSBP11A
SxRXD
IP2022
515-034.eps
SxRXM
SxTXP
SxTXM
D+
D-
USB Bus
SxRXP