IP2022 User’s Manual—Peripherals www.ubicom.com 261 ECLKEN TxCLK enable bit 0 =    TxCLK disabled. Port pin available for general-purpose           I/O.
1 =    TxCLK enabled as clock source for timer. Enabling this bit does not make any other restrictions on the use of
the TxCLK port pin for general-purpose I/O. CPI2EN TxCPI2 enable bit 0 =    System clock enabled as clock source for timer. TxCPI2           port pin available for general-purpose I/O.
1 =    TxCLK enabled as clock source for timer. Enabling this bit does not make any other restrictions on the use of
the port pin for general-purpose I/O. CPI1EN TxCPI1 enable bit 0 =    Capture 1 input disabled. TxCPI1 port pin available for           general-purpose I/O.
1 =    TxCPI1 enabled as capture 1 input. Enabling this bit does not make any other restrictions on the use of the
port pin for general-purpose I/O. ECLKEDG TxCLK edge sensitivity select. (This bit is ignored if the ECLKEN bit
is clear.) 0 =    TxCLK increments timer on rising edge
1 =    TxCLK increments timer on falling edge CAP1RST Reset timer on capture 1 event enable bit 0 =    Timer value unchanged by occurrence of a capture 1           event
1 =    Timer value cleared by occurrence of a capture 1 event TMREN Timer enable bit 0 =    Timer disabled. Timer clock source shut off to reduce           power consumption.
1 =    Timer enabled Name Description