IP2022 Users ManualPeripherals
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PWM mode, the 16-bit number latched into the internal compare
register by writing to the TxCMP1H register does not take effect
until the end of the current PWM cycle.
Reading the TxCMP1H or TxCMP1L registers returns the
previously written value whether or not the value stored in these
registers has been transferred to the internal compare register by
writing to the TxCMP1H register.
4.4.6
TxCAP2H/TxCAP2L or TxCMP2H/TxCMP2L Register
This register may be called the TxCAP2H/TxCAP2L register or the
TxCMP2H/TxCMP2L register.
In PWM mode, this register determines the period of the PWM
signal. In this mode, this register is both readable and writeable.
However, on writes the value is not applied until the end of the
current PWM cycle.
Writing to the TxCAP2L register causes the value to be stored in
the TxCAP2L register with no other effect. Writing to the TxCAP2H
register causes an internal compare register to be loaded with a
16-bit value in which the low 8 bits come from the TxCAP2L
register and the high 8 bits come from the value being written to
the TxCAP2H register. Software should write the TxCAP2L
register before writing the TxCAP2H register, because writing to
the TxCAP2H register is used as an indication that a new compare
value has been written. Writing to the TxCAP2H register is
required for the new compare value to take effect. In PWM mode,
the 16-bit number latched into the internal compare register by