Peripherals—IP2022 User’s Manual 256 www.ubicom.com 4.4.4 TxCAP1H/TxCAP1L Register The   TxCAP1H/TxCAP1L   register   captures   the   value   of   the
counter/timer when the TxCPI1 input is triggered. This register is
read-only. Reading the TxCAP1L register returns the least-significant 8 bits
of an internal capture register and causes the most-significant 8-
bits of the register to be latched into the TxCAP1H register. This
allows software to read the TxCAP1H register later and still be
assured of atomicity. 4.4.5 TxCMP1H/TxCMP1L Register In  Capture/Compare  mode, the  TxOUT output pin  is toggled  (if
enabled   by  the   OEN   bit  in   the  TxCFG1  register)  when  the
counter/timer increments to the value in the TxCMP1 register. In
this mode, the value written to the TxCMP1 register takes effect
immediately. Writing to the TxCMP1L register causes the value to be stored in
the   TxCMP1L   register   with   no   other   effect.   Writing   to   the
TxCMP1H  register  causes  an  internal  compare  register  to  be
loaded with a 16-bit value in which the low 8 bits come from the
TxCMP1L  register  and  high  8  bits  come  from  the  value  being
written   to   the   TxCMP1H   register.   Software   should   write   the
TxCMP1L register before writing the TxCMP1H register, because
writing to the TxCMP1H register is used as an indication that a
new compare value  has  been written. Writing  to  the  TxCMP1H
register is required for the new compare value to take effect. In