Peripherals—IP2022 User’s Manual 254 www.ubicom.com this  configuration,  the  CPI2CPI1  bit  in  the  TxCFG1  register  is
provided to internally tie the TxCPI1 and TxCPI2 inputs together,
which frees the TxCPI2 pin to be used as a general-purpose I/O
port pin. An  interrupt  can  be  generated  for  any  capture  event  and  for
counter/timer overflows. This   mode   also   features   an   output-compare   function.   The
TxCMP1H/TCMP1L register is constantly compared against the
internal counter/timer. When the counter/timer reaches the value
of   the   TxCMP1H/TxCMP1L   register   minus   one,   at   the   next
counter clock the TxOUT output is toggled. The TxOUT output, if
enabled via the OEN bit, can be driven high or low by writing to the
TOUTSET   and   TOUTCLR   bits   in   the   TxCFG2   register.   An
interrupt can be enabled for this event.