IP2022 User’s Manual—Peripherals www.ubicom.com 253 The  multifunction  timers  can  be  configured  to  interrupt  on  a
Capture  1  event  and  reset  the  counter/timer  on  the  event.  For
PWM  operation  without  Capture  1,  software  must  disable  the
Capture 1 input by clearing the CPI1EN bit in the TxCFG1 register. Timer Mode This  is  not  a  separate  timer  mode  (from  the  hardware  point  of
view), but is a conceptual mode for programmers. It is the PWM
mode, except that software disables the timer output by clearing
the OEN bit in the TxCFG register. Capture/Compare Mode In Capture/Compare mode, one or both of the timer capture inputs
(TxCPI1 and TxCPI2) may be used. Their pin functions must be
enabled  in  the  TxCFG1  register.  Each  capture  input  can  be
programmed in the TxCFG2 register to trigger on a rising edge,
falling edge, or both rising and falling edges. When  a  trigger  event  occurs  on  either  capture  pin,  the  current
value of the counter/timer is captured into the TxCAP1H/TxCAP1L
register or the TxCAP2H/TxCAP2L register for that input pin. The counter/timers can also be configured to reset on a TxCP1
input event, in which case the value of the counter/timer before it
was reset is captured in the TxCAP1H/TxCAP1L register and the
counter/timer is reset to zero. This mode is useful for measuring
the frequency (or width) of external signals. By using both capture
inputs and configuring them for opposite edges, the duty cycle of
a signal can also be measured. To avoid wasting I/O port pins in