IP2022 User’s Manual—Peripherals www.ubicom.com 239 part of the very next instruction, resulting in the second instruction
getting “old” data. To ensure predictable results, avoid using two
successive  read-modify-write  instructions  that  access  the  same
register  if  the  clock  rate  is  high,  or  insert  2  nop  instructions
between successive read-modify-write instructions (if the SYNC
bit in the FUSE1 register is clear, 3 nop instructions are required).
When  reading  from  the  RxOUT  register  rather  than  the  RxIN
register, the CPU reads data from a register instead of the port
pins. In this case, the nop instructions are not required. 4.1.3 RxIN Register The  RxIN  registers  are  virtual  registers  that  provide  read-only
access to the physical I/O pins. Reading these registers returns
the states on the pins, which may be driven either by the IP2022
or an external device. If the SYNC bit in the FUSE1 register is
clear,  the  states  are  read  from  a  synchronization  register.  If  an
application reads data from a device running asynchronously to
the   IP2022,   the   SYNC   bit   should   be   cleared   to   avoid   the
occurrence of metastable states (i.e. corrupt data caused by an
input which fails to meet the setup time before the sampling clock
edge, which theoretically could interfere with the operation of the
CPU). 4.1.4 RxOUT Register The RxOUT registers are data output buffer registers. The data in
these registers is driven on any I/O pins that are configured as