IP2022 Users ManualOverview
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on-chip serializer/deserializer (SERDES) units. These units
support popular communication protocols such as 10Base-T
Ethernet, GPSI, SPI, UART, and USB, allowing the IP2022 to be
used as a protocol converter in bridge and gateway applications.
By performing data serialization and deserialization in hardware,
the CPU bandwidth needed to support serial communications is
greatly reduced, especially at high baud rates. Providing two units
allows easy implementation of protocol conversion or bridging
functions, such as a USB-to-Ethernet bridge.
1.2.3
Low-Power Support
Particular attention has been paid to minimizing power
consumption. For example, an on-chip PLL allows use of a lower-
frequency external source (e.g., an inexpensive 2 MHz crystal can
be used to produce a 100 MHz on-chip clock), which reduces both
power consumption and EMI. In addition, software can change the
execution speed of the CPU to reduce power consumption, and a
mechanism is provided for automatically changing the speed on
entry and return from an interrupt service routine. The speed
instruction specifies power-saving modes that include a clock
divisor between 1 and 128. This divisor only affects the clock to the
CPU core, not the timers. The speed instruction also specifies
the clock source (OSC1 clock, RTCLK oscillator, or PLL clock
multiplier), and whether to disable the OSC1 clock oscillator or the
PLL. The speed instruction executes using the current clock
divisor.