OverviewIP2022 Users Manual
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Sophisticated Power and Frequency/Clock Management
Support
Operating voltage of 2.3V to 2.7V
Switching the system clock frequencies between different
clock sources
Changing the core clock using a selectable divider
Shutting down the PLL and/or the OSC input
Dynamic CPU speed control with speed instruction
Power-On-Reset (POR) logic
Flexible I/O
52 I/O Pins
2.3V to 3.3V symmetric CMOS output drive
5V-tolerant inputs
Port A pins capable of sourcing/sinking 24 mA
Optional I/O synchronization to CPU core clock
Programming and Debugging Support
Updateable application program
Run-time self programming
On-chip in-system programming interface
On-chip in-system debugging support interface
Debugging at full IP2022 operating speed
Programming at device supply voltage level
Real-time emulation, program debugging, and integrated soft-
ware development environment offered by leading third-party
tool vendors