Instruction Set Architecture—IP2022 User’s Manual 196 www.ubicom.com RETI #lit3 Return from Interrupt Operation: restore CPU registers from shadow registers Bits affected: STATUS register restored, which affects all bits Opcode: 0000 0000 0000 1nnn Description: This instruction causes a return from an interrupt
service  routine.  It  restores  the  16-bit  program
counter value that was saved when the interrupt
occurred. In addition, there are three instruction
options encoded by the three low-order bits of the
instruction, as shown in the table below. Cycles: 3 Bit Function 2 Reinstate the pre-interrupt speed
1 = enable, 0 = disable 1 Store the PC+1 value in the INTVECH and INTVECL
registers
1 = enable, 0 = disable 0 Add W to the T0TMR register
1 = enable, 0 = disable