Overview—IP2022 User’s Manual 4 www.ubicom.com On-Chip Memory • 64 Kbyte (32K × 16) program flash memory • 16 Kbyte (8K × 16) program/data RAM • 4 Kbyte linear-addressed data RAM • Self-programming  with  built-in  charge  pump:  instructions  to
read, write, and erase flash memory • Ability to address up to 128K bytes of external memory Fast   and  Deterministic   Program   Execution   and  Interrupt
Response • Predictable execution rate for real-time applications • Fast and deterministic 3-cycle interrupt response • 30 ns internal interrupt response at 100 MHz including context
save • Hardware save/restore of register context (PC, W, STATUS,
MULH, SPDREG, IPH, IPL, DPH, DPL, SPH, SPL, ADDRSEL,
DATAH, DATAL) Multiple  Networking  Protocols  and  Physical  Layer  Support
Hardware • Two full-duplex serializer/deserializer (SERDES) channels for
10Base-T (MAC/PHY), USB, and other fast serial protocols
– Embedded connectivity nodes – Two channels for protocol bridging – 10Base-T, GPSI, SPI, UART, USB protocols – Squelch function for 10Base-T Ethernet