Overview—IP2022 User’s Manual 2 www.ubicom.com It   can   be   programmed,   and   reprogrammed,   using   pre-built
software  modules  and  configuration  tools  to  create  true  single-
chip solutions for a wide range of device-to-device and device-to-
human  communication  applications.  Fabricated  in  an  advanced
0.25-micron  process,  its  RISC-based  deterministic  architecture
provides  high-speed  computation,  flexible  I/O  control,  efficient
data    manipulation,    in-system    programming,    and    in-system
debugging. Two  hardware  serializer/deserializer  (SERDES)  units  give  the
IP2022  the  ability  to  directly  connect  to  a  variety  of  common
network interfaces. This function provides the ability to implement
on-chip 10Base-T Ethernet (MAC and PHY), USB, and a variety
of other fast serial protocols. The inclusion of two SERDES units
facilitate  translation  from  one  format  to  another,  allowing  the
IP2022 to be used as a protocol converter. The 100 MHz operating
frequency,  with  most  instructions  executing  in  a  single  cycle,
delivers the throughput needed for emerging network connectivity
applications, and a flash-based program memory allows both in-
system  and  on-the-fly  reprogramming.  The  IP2022  implements
peripheral,  communications  and  control  functions  as  software
modules (ipModule™ software), replacing traditional hardware for
maximum  system  design  flexibility.  This  approach  allows  rapid,
inexpensive product design and, when needed, quick and easy
reconfiguration  to  accommodate  changes  in  market  needs  or
industry standards. On-chip dedicated hardware also includes a PLL, an 8-channel
10-bit   ADC,   general-purpose   timers,   single-cycle   multiplier,