IP2022 User’s Manual—Instruction Set Architecture www.ubicom.com 149 The  write  operation  does  not  complete  and  the
flash memory is not accessible until the FBUSY
bit  goes  clear  after  the  fwrite  instruction  is
executed. Therefore, any subsequent code that
uses  the  flash  memory  must  either  check  the
state of the FBUSY bit or wait a sufficient number
of delay cycles before proceeding.