IP2022 User’s Manual—Instruction Set Architecture www.ubicom.com 145 FREAD Read from Flash Memory Operation: DATAH || DATAL = (ADDRX || ADDRH || ADDRL) Bits affected: FBUSY bit in the XCFG register Opcode: 0000 0000 0001 1011 Description: This instruction transfers data from program flash
memory to data memory. The                                                                                          24-bit
ADDRX/ADDRH/ADDRL   register   specifies   the
address  of  a  16-bit  word  in  program  memory
which is loaded into the DATAH/DATAL register. If
the address is not in program flash memory, no
operation  is  performed.  The  instruction  is  non-
blocking   (i.e.   other   instructions   may   execute
before the read operation is complete). After executing this instruction, the FBUSY bit in
the    XCFG    register    is    set.    When    the    read
operation is complete, the FBUSY bit goes clear.
This   instruction   must   not   be   executed   if   the
FBUSY bit is already set from a previous fread, fwrite,    or   ferase   instruction.    Program execution  out  of  flash  memory  is  not  possible
while   the   FBUSY   bit   is   set,    therefore   this
instruction  can  only  be  executed  from  program
RAM. For more information, see Section 3.7.