IP2022 User’s Manual—Instruction Set Architecture www.ubicom.com 111 ADDC fr,W Add Carry,fr,W into fr Operation: fr = C + fr + W Bits affected: C, DC, Z Opcode: 0101 111f ffff ffff Description: This instruction adds the contents of W and the C
bit to the contents of the specified data memory
location and writes the 8-bit result into the same
data memory location. W is left unchanged. The
register contents are treated as unsigned values. If the result of addition exceeds 0xFF, the C bit is
set  and  the  lower  eight  bits  of  the  result  are
written to the data memory location. Otherwise,
the C bit is cleared. If there is a carry from bit 3 to bit 4, the DC (digit
carry) bit is set. Otherwise, the bit is cleared. If  the  result  of  addition  is zero, the Z  bit is  set.
Otherwise, the Z bit is cleared. A sum of 0x100 is
considered zero and therefore sets the Z bit. Cycles: 1