IP2022 Users ManualInstruction Set Architecture
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107
ADD W,fr
Add W,fr into W
Operation:
W = W + fr
Bits affected:
C, DC, Z
Opcode:
0001 110f ffff ffff
Description:
This instruction adds the contents of the specified
data memory location to the contents of W and
writes the 8-bit result into W. The data memory
location is left unchanged. The register contents
are treated as unsigned values.
If the result of addition exceeds 0xFF, the C bit is
set and the lower eight bits of the result are
written to W. Otherwise, the C bit is cleared.
If there is a carry from bit 3 to bit 4, the DC (digit
carry) bit is set. Otherwise, the DC bit is cleared.
If the result of addition is zero, the Z bit is set.
Otherwise, the Z bit is cleared. A sum of 0x100 is
considered zero and therefore sets the Z bit.
Cycles:
1