IP2022 Users ManualInstruction Set Architecture
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105
ADD fr,W
Add fr,W into fr
Operation:
fr = fr + W
Bits affected:
C, DC, Z
Opcode:
0001 111f ffff ffff
Description:
This instruction adds the contents of W to the
contents of the specified data memory location
and writes the 8-bit result into the same data
memory location. W is left unchanged. The
register contents are treated as unsigned values.
If the result of addition exceeds 0xFF, the C bit is
set and the lower eight bits of the result are
written to the data memory location. Otherwise,
the C bit is cleared.
If there is a carry from bit 3 to bit 4, the DC (digit
carry) bit is set. Otherwise, the bit is cleared.
If the result of addition is zero, the Z bit is set.
Otherwise, the Z bit is cleared. A sum of 0x100 is
considered zero and therefore sets the Z bit.
Cycles:
1 (3, if jumping by using PCL as the destination)