IP2022 User’s Manual—Instruction Set Architecture www.ubicom.com 85 3.6 Instruction Set Summary Tables Table 3-3  through  Table 3-8  list  all  of  the  IP2022  instructions,
organized by category. For each instruction, the table shows the
instruction mnemonic (as written in assembly language), a brief WDT Watchdog Timer counter and prescaler rx Port control register pointer (RA, RB, RC, RD, RE,
RF, or RG) f “fr” field bit in opcode k Constant value bit in opcode n Numerical value bit in opcode b Bit position selector bit in opcode , Register/bit selector separator in assembly lan-
guage instruction (e.g. clrb status,z) # Immediate literal designator in assembly language
instruction (e.g. mov w,#0xff) #lit8 8-bit literal value in assembly language instruction addr13 13-bit address in assembly language instruction addr16                       16-bit address in assembly language instruction
(address)    Contents of memory referenced by address | Logical OR || Concatenation ^ Logical exclusive OR & Logical AND != inequality Symbol Description