Instruction Set Architecture—IP2022 User’s Manual 84 www.ubicom.com 3.5 Key to Abbreviations and Symbols Symbol Description W Working register fr “File register” field (a 9-bit operand address speci-
fied in the instruction) PCL Virtual register for direct PC modification (special-
purpose register 0x009) STATUS STATUS register (special-purpose register 0x00B) IPH Upper half of register for indirect addressing (spe-
cial-purpose register 0x004) IPL Lower half of register for indirect addressing (spe-
cial-purpose register 0x005) DPH Upper half of pointer register for indirect-with-offset
addressing (special-purpose register 0x00C) DPL Lower half of pointer register for indirect-with-offset
addressing (special-purpose register 0x00D) SPH Upper half of pointer register for indirect-with-offset
addressing (special-purpose register 0x006) SPL Lower half of pointer register for indirect-with-offset
addressing (special-purpose register 0x007) C Carry bit in the STATUS register (bit 0) DC Digit Carry bit in the STATUS register (bit 1) Z Zero bit in the STATUS register (bit 2 PD Power Down bit in the STATUS register (bit 3) TO Watchdog Timeout bit in the STATUS register (bit 4) PA2:0 Page bits in the STATUS register (bits 7:5)