INCLUDE "c:\program files\scenix\includes\sx18.inc" ; ; Sample ASM file to test Chuck's Assembler. ; ; ; ; ; ; ; ; Each opcode should appear: ; - with the minimum parm values ; - with the maximum parm values ; - specifying optional parms ; - omitting optional parms ; - with too few parms ; - with too many parms ; ; Also, intentionally trigger each warning messages ; v0 equ 0x00 v10 equ 0x10 v11 equ 0x11 v12 equ 0x12 v13 equ 0x13 v14 equ 0x14 v15 equ 0x15 v16 equ 0x16 v17 equ 0x17 v18 equ 0x18 v19 equ 0x19 v1a equ 0x1A v1b equ 0x1B v1c equ 0x1C v1d equ 0x1D v1e equ 0x1E v1f equ 0x1F v2f equ 0x2F v30 equ 0x30 v31 equ 0x31 v32 equ 0x32 v33 equ 0x33 v34 equ 0x34 v35 equ 0x35 v36 equ 0x36 v37 equ 0x37 v38 equ 0x38 v39 equ 0x39 v3a equ 0x3A v3b equ 0x3B v3c equ 0x3C v3d equ 0x3D v3e equ 0x3E v3f equ 0x3F Label1 ;;;;;;;;;;; ADDWF f, d 0001 110f ffff 1 2 31 1 <<5 1 Add fr to W ADD W,fr 1 1 C, DC, Z ;;;;;;;;;;; ADDWF f, d 0001 111f ffff 1 2 31 1 <<5 1 Add W to fr ADD fr,W 1 1 C, DC, Z addwf v0 addwf v1f addwf v2f addwf v3f addwf v0 ,w addwf v1f ,w addwf v2f ,w addwf v3f ,w addwf v0 ,f addwf v1f ,f addwf v2f ,f addwf v3f ,f addwf v3f ,2 addwf $100 addwf addwf 0 0 0 Label2 ;;;;;;;;;;; ANDWF f, d 0001 010f ffff 1 2 31 1 <<5 1 AND of W and fr into W AND W, fr 1 1 Z ;;;;;;;;;;; ANDWF f, d 0001 011f ffff 1 2 31 1 <<5 1 AND of fr and W into fr AND fr, W 1 1 Z andwf v0 andwf v1f andwf v2f andwf v3f andwf v0 ,w andwf v1f ,w andwf v2f ,w andwf v3f ,w andwf v0 ,f andwf v1f ,f andwf v2f ,f andwf v3f ,f andwf v3f ,2 andwf $100 andwf andwf 0 0 0 ;;;;;;;;;;; ANDLW k 1110 kkkk kkkk 1 1 255 0 0 AND of W and Literal into W AND W,#lit 1 1 Z andlw v0 andlw $ff andlw $100 andlw andlw 0 0 ;;;;;;;;;;; BANK n 0000 0001 1nnn 1 1 255 0 0 Load Bank Number into FSR(7:5) BANK addr8 1 1 bank BANK0 bank BANK1 bank BANK2 bank BANK3 bank BANK4 bank BANK5 bank BANK6 bank BANK7 bank $ff bank $100 bank bank 0 0 ;;;;;;;;;;; BCF f, b 0100 bbbf ffff 2 2 31 7 <<5 0 Clear Bit in fr CLRB fr.bit 1 1 bcf v0 ,0 bcf v0 ,1 bcf v0 ,2 bcf v0 ,3 bcf v0 ,4 bcf v0 ,5 bcf v0 ,6 bcf v0 ,7 bcf v1f ,0 bcf v2f ,0 bcf v3f ,0 bcf v1f ,7 bcf v2f ,7 bcf v3f ,7 bcf v3f ,8 bcf $100, 0 bcf 0 bcf 0 0 0 ;;;;;;;;;;; BSF f, b 0101 bbbf ffff 2 2 31 7 <<5 0 Set Bit in fr SETB fr.bit 1 1 bsf v0 ,0 bsf v0 ,1 bsf v0 ,2 bsf v0 ,3 bsf v0 ,4 bsf v0 ,5 bsf v0 ,6 bsf v0 ,7 bsf v1f ,0 bsf v2f ,0 bsf v3f ,0 bsf v1f ,7 bsf v2f ,7 bsf v3f ,7 bsf v3f ,8 bsf $100 0 bsf 0 bsf 0 0 0 ;;;;;;;;;;; BTFSC f, b 0110 bbbf ffff 2 2 31 7 <<5 0 Test Bit in fr; Skip if Clear SNB fr.bit 1/2 1/2 btfsc v0 ,0 btfsc v0 ,1 btfsc v0 ,2 btfsc v0 ,3 btfsc v0 ,4 btfsc v0 ,5 btfsc v0 ,6 btfsc v0 ,7 btfsc v1f ,0 btfsc v2f ,0 btfsc v3f ,0 btfsc v1f ,7 btfsc v2f ,7 btfsc v3f ,7 btfsc v3f ,8 btfsc $100 0 btfsc 0 btfsc 0 0 0 ;;;;;;;;;;; BTFSS f, b 0111 bbbf ffff 2 2 31 7 <<5 0 Test Bit in fr; Skip if Set SB fr.bit 1/2 1/2 btfss v0 ,0 btfss v0 ,1 btfss v0 ,2 btfss v0 ,3 btfss v0 ,4 btfss v0 ,5 btfss v0 ,6 btfss v0 ,7 btfss v1f ,0 btfss v2f ,0 btfss v3f ,0 btfss v1f ,7 btfss v2f ,7 btfss v3f ,7 btfss v3f ,8 btfss $100 0 btfss 0 btfss 0 0 0 ;;;;;;;;;;; CALL k 1001 kkkk kkkk 1 1 255 0 0 Call Subroutine CALL addr8 2 3 call $ff call Label2 call $100 call call 0 0 ;;;;;;;;;;; CLRF f 0000 011f ffff 1 1 31 0 0 Clear fr CLR fr 1 1 Z clrf v0 clrf v1f clrf v2f clrf v3f clrf $100 clrf clrf 0 0 ;;;;;;;;;;; CLRW 0000 0100 0000 0 0 0 0 0 Clear W CLR W 1 1 Z clrw clrw 0 ;;;;;;;;;;; CLRWDT 0000 0000 0100 0 0 0 0 0 Clear Watchdog Timer CLR !WDT 1 1 TO, PD clrwdt clrwdt 0 ;;;;;;;;;;; DECF f, d 0000 110f ffff 1 2 31 1 <<5 1 Move (fr-1) to W MOV W,--fr 1 1 Z ;;;;;;;;;;; DECF f, d 0000 111f ffff 1 2 31 1 <<5 1 Decrement fr DEC fr 1 1 Z decf v0 decf v1f decf v2f decf v3f decf v0 ,w decf v1f ,w decf v2f ,w decf v3f ,w decf v0 ,f decf v1f ,f decf v2f ,f decf v3f ,f decf v3f ,2 decf $100 0 decf decf 0 0 0 ;;;;;;;;;;; DECFSZ f, d 0010 110f ffff 1 2 31 1 <<5 1 Move (fr-1) to W; Skip if Zero MOVSZ W,--fr 1/2 1/2 ;;;;;;;;;;; DECFSZ f, d 0010 111f ffff 1 2 31 1 <<5 1 Decrement fr; Skip if Zero DECSZ fr 1/2 1/2 decfsz v0 decfsz v1f decfsz v2f decfsz v3f decfsz v0 ,w decfsz v1f ,w decfsz v2f ,w decfsz v3f ,w decfsz v0 ,f decfsz v1f ,f decfsz v2f ,f decfsz v3f ,f decfsz v3f ,2 decfsz $100 ,0 decfsz decfsz 0 0 0 ;;;;;;;;;;; GOTO k 101k kkkk kkkk 1 1 511 0 0 Jump to Address JMP addr9 2 3 goto Label1 goto $00 goto $1FF goto $200 goto goto 0 0 ;;;;;;;;;;; INCF f, d 0010 100f ffff 1 2 31 1 <<5 1 Move (fr+1) to W MOV W,++fr 1 1 Z ;;;;;;;;;;; INCF f, d 0010 101f ffff 1 2 31 1 <<5 1 Increment fr INC fr 1 1 Z incf v0 incf v1f incf v2f incf v3f incf v0 ,w incf v1f ,w incf v2f ,w incf v3f ,w incf v0 ,f incf v1f ,f incf v2f ,f incf v3f ,f incf v3f ,2 incf $100 ,0 incf incf 0 0 0 ;;;;;;;;;;; INCFSZ f 0011 111f ffff 1 1 31 1 <<5 1 Increment fr; Skip if Zero INCSZ fr 1/2 1/2 ;;;;;;;;;;; INCFSZ f, d 0011 110f ffff 1 2 31 1 <<5 1 Move (fr+1) to W; Skip if Zero MOVSZ W,++fr 1/2 1/2 incfsz v0 incfsz v1f incfsz v2f incfsz v3f incfsz v0 ,w incfsz v1f ,w incfsz v2f ,w incfsz v3f ,w incfsz v0 ,f incfsz v1f ,f incfsz v2f ,f incfsz v3f ,f incfsz v3f ,2 incfsz incfsz 0 0 0 ;;;;;;;;;;; IORWF f, d 0001 000f ffff 1 2 31 1 <<5 1 OR of W and fr into W OR W,fr 1 1 Z ;;;;;;;;;;; IORWF f, d 0001 001f ffff 1 2 31 1 <<5 1 OR of fr and W into fr OR fr,W 1 1 Z iorwf v0 iorwf v1f iorwf v2f iorwf v3f iorwf v0 ,w iorwf v1f ,w iorwf v2f ,w iorwf v3f ,w iorwf v0 ,f iorwf v1f ,f iorwf v2f ,f iorwf v3f ,f iorwf v3f ,2 iorwf iorwf 0 0 0 ;;;;;;;;;;; IORLW k 1101 kkkk kkkk 1 1 255 0 0 OR of W and Literal into W OR W,#lit 1 1 Z iorlw v0 iorlw $ff iorlw $100 iorlw iorlw 0 0 ;;;;;;;;;;; IREAD 0000 0100 0001 0 0 0 0 0 Read Word from Instruction Memory IREAD 1 4 iread iread 0 ;;;;;;;;;;; MOVFW f 0010 000f ffff 1 1 31 0 0 Move fr to W MOV W,fr 1 1 Z movfw v0 movfw v1f movfw v2f movfw v3f movfw movfw 0 0 ;;;;;;;;;;; MODE k 0000 0101 kkkk 1 1 15 0 0 Move Literal to MODE Register MOV M,#lit 1 1 mode 0 mode $ff mode $10 mode mode 0 0 ;;;;;;;;;;; MOVLW k 1100 kkkk kkkk 1 1 255 0 0 Move Literal to W MOV W,#lit 1 1 movlw v0 movlw $ff movlw $100 movlw movlw 0 0 ;;;;;;;;;;; MOVMW 0000 0100 0011 0 0 0 0 0 Move W to MODE Register MOV M,W 1 1 movmw movmw 0 ;;;;;;;;;;; MOVWF f 0000 001f ffff 1 1 31 0 0 Move W to fr MOV fr,W 1 1 movwf v0 movwf v1f movwf v2f movwf v3f movwf $ff movwf $100 movwf movwf 0 0 ;;;;;;;;;;; MOVWM 0000 0100 0010 0 0 0 0 0 Move MODE Register to W MOV W,M 1 1 movwm movwm 0 ;;;;;;;;;;; MOVWO 0000 0000 0010 0 0 0 0 0 Move W to OPTION Register MOV !OPTION, W 1 1 movwo movwo 0 ;;;;;;;;;;; TRIS r 0000 0000 0fff 1 1 3 0 0 Move W to Port Rx Control Reg MOV !rx,W 1 1 tris 5 tris 6 tris 7 tris 4 tris 8 tris tris 0 0 ;;;;;;;;;;; NOP 0000 0000 0000 0 0 0 0 0 No Operation NOP 1 1 nop nop 0 ;;;;;;;;;;; NOTF f, d 0010 010f ffff 1 2 31 1 <<5 1 Move Complement of fr to W MOV W,/fr 1 1 Z ;;;;;;;;;;; NOTF f, d 0010 011f ffff 1 2 31 1 <<5 1 Complement of fr into fr NOT fr 1 1 Z notf v0 notf v1f notf v2f notf v3f notf v0 ,w notf v1f ,w notf v2f ,w notf v3f ,w notf v0 ,f notf v1f ,f notf v2f ,f notf v3f ,f notf v3f ,2 notf $100 notf notf 0 0 0 ;;;;;;;;;;; PAGE n 0000 0001 0nnn 1 1 7 0 0 Load Page Number into STATUS(7:5) PAGE addr12 1 1 page 0 page 1 page 2 page 3 page 4 page 5 page 6 page 7 page 8 page 9 page page 0 0 ;;;;;;;;;;; RETURN 0000 0000 1100 0 0 0 0 0 Return from Subroutine RET 2 3 return return 0 ;;;;;;;;;;; RETI 0000 0000 1110 0 0 0 0 0 Return from Interrupt RETI 2 3 all reti reti 0 ;;;;;;;;;;; RETIW 0000 0000 1111 0 0 0 0 0 RETI; Adjust RTCC with W RETIW 2 3 all retiw retiw 0 ;;;;;;;;;;; RETP 0000 0000 1101 0 0 0 0 0 Return fcross Page Boundary RETP 2 3 retp retp 0 ;;;;;;;;;;; RETLW k 1000 kkkk kkkk 1 1 255 0 0 Return with Literal in W RETW lit 2 3 retlw 0 retlw $ff retlw $100 retlw retlw 0 0 ;;;;;;;;;;; RLF f 0011 011f ffff 1 2 31 1 <<5 1 Rotate fr Left through Carry RL fr 1 1 C ;;;;;;;;;;; RLF f, d 0011 010f ffff 1 2 31 1 <<5 1 Rotate fr Left and Move to W MOV W,<>fr 1 1 C rrf v0 rrf v1f rrf v2f rrf v3f rrf v0 ,w rrf v1f ,w rrf v2f ,w rrf v3f ,w rrf v0 ,f rrf v1f ,f rrf v2f ,f rrf v3f ,f rrf v3f ,2 rrf $100 rrf rrf 0 0 0 ;;;;;;;;;;; SLEEP 0000 0000 0011 0 0 0 0 0 Power Down Mode SLEEP 1 1 TO, PD sleep sleep 0 ;;;;;;;;;;; SUBWF f, d 0000 100f ffff 1 2 31 1 <<5 1 Move (fr-W) to W MOV W,fr-W 1 1 C, DC, Z ;;;;;;;;;;; SUBWF f, d 0000 101f ffff 1 2 31 1 <<5 1 Subtract W from fr SUB fr,W 1 1 C, DC, Z subwf v0 subwf v1f subwf v2f subwf v3f subwf v0 ,w subwf v1f ,w subwf v2f ,w subwf v3f ,w subwf v0 ,f subwf v1f ,f subwf v2f ,f subwf v3f ,f subwf v3f ,2 subwf $100 subwf subwf 0 0 0 ;;;;;;;;;;; SWAPF f 0011 101f ffff 1 2 31 1 <<5 1 Swap High/Low Nibbles of fr SWAP fr 1 1 ;;;;;;;;;;; SWAPF f, d 0011 100f ffff 1 2 31 1 <<5 1 Swap Nibbles of fr and move to W MOV W,<>fr 1 1 swapf v0 swapf v1f swapf v2f swapf v3f swapf v0 ,w swapf v1f ,w swapf v2f ,w swapf v3f ,w swapf v0 ,f swapf v1f ,f swapf v2f ,f swapf v3f ,f swapf v3f ,2 swapf $100 swapf swapf 0 0 0 ;;;;;;;;;;; TESTF f 0010 001f ffff 1 1 31 0 0 Test fr for Zero TEST fr 1 1 Z testf v0 testf v1f testf v2f testf v3f testf $100 testf testf 0 0 ;;;;;;;;;;; XORWF f, d 0001 100f ffff 1 2 31 1 <<5 1 XOR of W and fr into W XOR W,fr 1 1 Z ;;;;;;;;;;; XORWF f, d 0001 101f ffff 1 2 31 1 <<5 1 XOR of fr and W into fr XOR fr,W 1 1 Z xorwf v0 xorwf v1f xorwf v2f xorwf v3f xorwf v0 ,w xorwf v1f ,w xorwf v2f ,w xorwf v3f ,w xorwf v0 ,f xorwf v1f ,f xorwf v2f ,f xorwf v3f ,f xorwf v3f ,2 xorwf $100 xorwf xorwf 0 0 0 ;;;;;;;;;;; XORLW k 1111 kkkk kkkk 1 1 255 0 0 XOR of W and Literal into W XOR W,#lit 1 1 Z xorlw 0 xorlw $ff xorlw $100 xorlw xorlw 0 0