NX26F160
diagrams for Read and Erase/Write operations are shown in
Figures 5 and 6, Figures 7 and 8, and Figures 9 and 10,
respectively. All data within an instruction sequence is
clocked on the rising edge. All instruction sequence fields are
ordered by most significant bit first (MSB). Data is erased and
written to the NX26F160 and NX26F080A memory array a full
sector (536 bytes) at a time. If all 536 bytes of a given sector
are not fully clocked into the device, the remaining byte
locations will be overwritten with indeterminate values. To
ensure the highest level of data integrity write operations
should be verified and rewritten, if needed, (see High Data
Integrity Applications).
Upon power-up and between Read and Erase/Write instruc-
tion sequences, the device's internal control logic will be
reset. This is accomplished by asserting the SCK pin low
(to V
rising edge of SCK. After an initial rising SCK occurs, the
device becomes ready for a new instruction sequence. Full
active power consumption starts after the correct device
address is decoded during a Read or Write instruction
sequence. To idle an instruction sequence between clocks,
SCK must be kept high (at V
After power-up it is recommended that the device information
sector be read to electronically identify the device. The
device information format contains a device ID that identifies
the manufacturer, part number (memory size), and operating
range. It also contains a list of any restricted sectors
(see Sector Tag/Sync bytes). For a further description of the
NX26F080A and NX26F160 device information format, see
the Serial Flash Device Information Sector Application Note
SFAN-02.
sector address is at 5000H for both the NX26F080A and
NX26F160. The device information sector is a "read-only"
sector. This assures that all device specific information,
such as the restricted sector list, is maintained and never
written over inadvertently.
NX26F080 (non A), which does not have a separate device
information sector, a copy of the device information sector is
also provided in the last two sectors of the NX26F080A
(07FFH and 07FEH) and NX26F160 (0FFFH and 0FFEH).
Contact
After an Erase/Write instruction sequence has been
executed, the device will become Busy while it erases and
writes the addressed sector's memory. This period of time
will not exceed t
tested for a Ready/Busy condition via a 16-bit status value
obtained in the Read instruction sequence. The Busy status
condition (6666H) indicates that the device has not yet
completed its write operation and will not accept read or write
instructions. The Ready status condition (9999H) indicates
that the device is available for further read or write operations.
Note that a delay time of t
to high clock transition of the Ready/Busy status read.
The first byte of each sector is pre-programmed during
manufacturing with a Tag/Sync value of "C9H". Although the
first byte of each sector can be changed, it is recommended
that Tag/Sync value be maintained and incorporated as part
of the application's sector formatting. The Tag/Sync values
serve two purposes. First, they provide a sync-detect that
can help verify if the instruction sequence was clocked into
the device properly. Secondly, they serve as a tag to identify
a fully functional (valid) sector. This is especially important
if "restricted sector" devices are used.
alternative to NX26F080A or NX26F160 devices with 100%
valid sectors. Restricted sector devices have a limited
number of sectors (64 maximum. for the NX26F080A and
NX26F160) that do not meet manufacturing programming
criteria over the specified operating range. When such a
sector is detected, the first byte is tagged with a pattern other
than "C9H". In addition to individual sector tagging, all
restricted sectors for a given device are listed in the "device
information format" (see Device Initialization).
Data storage applications that use Flash memory or other
non-volatile media must take into consideration the possibil-
ity of noise or other adverse system conditions that may
affect data integrity. For those applications that require higher
levels of data integrity it is a recommended practice to use
Error Correcting Code (ECC) techniques. The NexFlash
Serial Flash Development Kit provides a software routine for
a 32-bit ECC that can detect up to two bit errors and correct
one. The ECC not only minimizes problems caused by
system noise but can also extend Flash memory endurance.
For those systems without the processing power to handle
ECC algorithms, a simple "verification after write" is recom-
mended. The NexFlash Serial Flash Development Kit
software includes a simple Write/Verify routine that will
compare data written to a given sector and rewrite the sector
if the compare is not correct.