Parallax Instruction Chart

The chart below lists all of the Parallax instructions, their operands, number of program words, instruction cycles, and side effects.

Keep this information handy as you write and debug programs. Some of the most difficult bugs to locate and eliminate are those caused by:

• Attempting to skip over multiple-word instructions.
• Failing to anticipate the effects of changes in the status flags.

You can squash these bugs before they bite by keeping a copy of the chart close at hand while you program. For example, if you plan to use one of the skip instructions, make sure that the instruction to be skipped is one program word long.

You can also use the chart to help you calculate the time required for your code to execute. Just add the number of program cycles for each instruction. This can get a little tricky within loops, so I frequently cheat and use the PSIM simulator to do my counting for me.
 
 

Instruction	Operands	Words	Cycles	Affects
ADD	fr, #literal	2	2	C, DC, Z
	fra, frb	2	2	C, DC, Z
	fr, W	1	1	C, DC, Z
	W, fr	1	1	C, DC, Z
ADDB	fr, bit	2	2	Z
AND	fr, #literal	2	2	W, Z
	fra, frb	2	2	W, Z
	fr, W	1	1	Z
	W, #literal	1	1	Z
	W, fr	1	1	Z
CALL	addr8	1	2	none
CJA	fr, #literal, addr9	4	4/5	C, DC, Z
	fr1, fr2, addr9	4	4/5	C, DC, Z
CJAE	fr, #literal, addr9	4	4/5	C, DC, Z
	fr1, fr2, addr9	4	4/5	C, DC, Z
CJB	fr, #literal, addr9	4	4/5	C, DC, Z
	fr1, fr2, addr9	4	4/5	C, DC, Z
CJBE	fr, #literal, addr9	4	4/5	C, DC, Z
	fr1, fr2, addr9	4	4/5	C, DC, Z
CJE	fr, #literal, addr9	4	4/5	C, DC, Z
	fr1, fr2, addr9	4	4/5	C, DC, Z
CJNE	fr, #literal, addr9	4	4/5	C, DC, Z
	fr1, fr2, addr9	4	4/5	C, DC, Z
CLC	none	1	1	C
CLR	fr	1	1	Z
CLR	W	1	1	Z
CLR	WDT	1	1	TO, PD
CLRB	bit	1	1	none
CLZ	none	1	1	Z
CSA	fr, #literal	3	3/4	C, DC, Z
	fr1, fr2	3	3/4	C, DC, Z
CSAE	fr, #literal	3	3/4	C, DC, Z
	fr1, fr2	3	3/4	C, DC, Z
CSB	fr, #literal	3	3/4	C, DC, Z
	fr1, fr2	3	3/4	C, DC, Z
CSBE	fr, #literal	3	3/4	C, DC, Z
	fr1, fr2	3	3/4	C, DC, Z
CSE	fr, #literal	3	3/4	C, DC, Z
	fr1, fr2	3	3/4	C, DC, Z
CSNE	fr, #literal	3	3/4	C, DC, Z
	fr1, fr2	3	3/4	C, DC, Z
DEC	fr	1	1	Z
DECSZ	fr	1	1/2	none
DJNZ	fr, addr9	2	2/3	none
IJNZ	fr, addr9	2	2/3	none
INC	fr	1	1	Z
INCSZ	fr	1	1/2	none
JB	bit, addr9	2	2/3	none
JC	addr9	2	2/3	none
JMP	addr9	1	2	none
JMP	PC+W	1	2	C, DC, Z
JMP	W	1	2	none
JNB	bit, addr9	2	2/3	none
JNC	addr9	2	2/3	none
JNZ	addr9	2	2/3	none
JZ	addr9	2	2/3	none
LCALL	addr11	1-3	2-4	none
LJMP	addr11	1-3	2-4	none
LSET	addr11	0-2	0-2	none
MOV	fr, #literal	2	2	none
	fr1, fr2	2	2	Z
	fr, W	1	1	none
	Option, #literal	2	2	none
	Option, fr	2	2	Z
	Option, W	1	1	none
	!port_fr, #literal	2	2	none
	!port_fr, fr	2	2	Z
	!port_fr, W	1	1	none
	W, #literal	1	1	none
	W, fr	1	1	Z
	W, /fr	1	1	Z
	W, fr-W	1	1	C, DC, Z
	W, ++fr	1	1	Z
	W, --fr	1	1	Z
	W, <<fr	1	1	C
	W, >>fr	1	1	C
	W, <>fr	1	1	none
MOVB	bit1, bit2	4	4	none
	bit1, /bit2	4	4	none
MOVSZ	W, ++fr	1	1/2	none
	W, --fr	1	1/2	none
NEG	fr	2	2	Z
NOP	none	1	1	none
NOT	fr	1	1	Z
	W	1	1	Z
OR	fr, #literal	2	2	Z
	fr1, fr2	2	2	Z
	fr, W	1	1	Z
	W, #literal	1	1	Z
	W, fr	1	1	Z
RET	none	1	2	none
RETW	literal1, literal2...	?	2 per	none
RL	fr	1	1	C
RR	fr	1	1	C
SB	bit	1	1/2	none
SC	none	1	1/2	none
SETB	bit	1	1	none
SKIP	none	1	2	none
SLEEP	none	1	1	TO, PD
SNB	bit	1	1/2	none
SNC	none	1	1/2	none
SNZ	none	1	1/2	none
STC	none	1	1	C
STZ	none	1	1	Z
SUB	fr, #literal	2	2	C, DC, Z
	fr1, fr2	2	2	C, DC, Z
	fr, W	1	1	C, DC, Z
SUBB	fr, bit	2	2	Z
SWAP	fr	1	1	none
SZ	none	1	1/2	none
TEST	fr	1	1	Z
TEST	W	1	1	Z
XOR	fr, #literal	2	2	Z
	fr1, fr2	2	2	Z
	fr, W	1	1	Z
	W, #literal	1	1	Z
	W, fr	1	1	Z