ON 20040708@1:36:57 PM at page:
http://www.piclist.com/microchip/math/div/48by24ng.htm#38176.5108449074
James Newton[JMN-EFP-786] published post 38176.5108449074

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I believe there is an error in the 24/24 non-restoring routine. The line 'btfsc Temp2, 7' after the shifts at the beginning of the loop needs to be 'btfss Dividend+5, 0' instead, like on the 24/23 version. With that change, it produced correct output for me. Tested with 0B90F0/00007D which gives 0017B0 .<BR>
Mat Nieuwenhoven
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ON 20040708@1:37:19 PM at page:
http://www.piclist.com/techref/microchip/math/div/48by24ng.htm#38176.5146180556
James Newton[JMN-EFP-786] published post 38176.5146180556

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One more note: I referred to 24/24 above because I shortened the Dividend to 3 bytes instead of 6. I don't think the number of bits has much influence on the algorithm, though.<BR>
Mat Nieuwenhoven
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ON 20040708@1:38:10 PM at page:
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James Newton[JMN-EFP-786] Replied to post 38176.5108449074

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<A TITLE="80.57.194.51" NAME="38176.5108449074">
</A> 
I believe there is an error in the 24/24 non-restoring routine. The line 'btfsc Temp2, 7' after the shifts at the beginning of the loop needs to be 'btfss Dividend+5, 0' instead, like on the 24/23 version. With that change, it produced correct output for me. Tested with 0B90F0/00007D which gives 0017B0 .<BR>
Mat Nieuwenhoven

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ON 20040712@11:47:26 PM at page:
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