Simon Nield [simon.nield at QUANTEL.COM] quotes the data sheets:

"To enter programming mode, VDD must be applied to the RB3/PGM provided the LVP bit is set. The LVP bit defaults to on ('1') from the factory"

[me: VDD means HIGH by the way]

and in the box below that:

"Note1: The high voltage programming mode is always available, regardless of the state of the LVP bit, by applying VIHH to the /MCLR pin."

Now that is a _little_ ambiguous but... 

CONF  RB3  /MCLR
LVP   PGM   VPP   mode
0     0     0     normal operating mode
0     0     1     high voltage programming mode
0     1     0     normal operating mode
0     1     1     high voltage programming mode
1     0     0     normal operating mode
1     0     1     ???? [Ed: dispite this looking vague, its the one that works. See Jim Roberston's findings]
1     1     0     low voltage programming mode
1     1     1     high voltage programming mode [Ed: Nope! See Jim Roberston's findings]


where LVP = 0 means the bit is cleared
      LVP = 1 means the bit is set; AS SHIPPED
      PGM = 0 means 0v/pulldown on RB3
      PGM = 1 means 5v/pullup on RB3
      VPP = 0 means 5v on /MCLR
      VPP = 1 means VIHH on /MCLR

there would appear to me to be only one state that is vague. ???? is either high voltage programming mode if you believe Note1 or normal operating mode if you have more faith in the first statement. [Ed: The datasheets are wrong. See Jim Roberston's findings]

See also:

Questions: