ã 2001 Microchip Technology Inc. DS51242A-page 9 PIC16F87X Debugger Control Figure 2.3:  BIGBUG Register (Address 18Fh)     2.5 Communicating with the Target Device The debug executive establishes the communication channel between the
target device (RB<7:6>) and computer software (e.g., MPLAB IDE.) Since the debugger will issue read-modify-write instructions (BSF, BCF) on
PORTB for communication with the debugger interface module, addresses
0x106 and 0x186 should be used to modify PORTB<7:6> and TRISB<7:6> so
that bits <5:0> are not corrupted. If the user requests a read or a write of
PORTB or TRISB, addresses 0x006 and 0x086 can be used to access the
RB<5:0> portions of the register. 2.6 Resetting and Running Programs In the debug environment, the target device reset pin can be activated by the
module/target connector or by the target system resources. After reset, the
target device will begin running the target program. To begin debugger
execution, initiate a hardware halt (on I/O pin.) 2.7 Halting Execution If BKBUG is programmed to 0, the INBUG flag is clear, and a halt signal occurs,
normal program execution is halted and the on-chip debugger is entered. A
halt signal will be generated when either: •  RB6 transitions from high to low •  the current PC value matches the value of BKA<12:0> •  the SSTEP bit is set R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 BKA07 BKA06 BKA05 BKA04 BKA03 BKA02 BKA01 BKA00 R        = Readable bit
W   = Writable bit
U = Unimplemented bit,             read as ‘0’
- n  = Value at POR reset bit7 bit0 bit 7-0: BKA: Breakpoint Address When writing, represents the requested breakpoint address.
When reading, represents the value of the PC at last breakpoint, halt, or single step operation. Note: A hardware halt after reset will execute location 0x0000 and then
skid  to  0x0001.  Therefore,  a  NOP  is  recommended  at  location
0x0000.