ON 20020416@4:05:43 AM at page:
http://www.piclist.com/techref/member/pJC-sprintmail-IA5/index.htm
pJC-sprintmail-IA5 Paul J Cunningham added 'Questions:

Ref: Microchip Application note AN554, Software implementation of I2C bus master.  
"On initialization, these I/O lines are configured as input pins (tri-state) and their respective latchs are loaded with 0's.  To emulate the high (passive), these lines are configured as inputs.  To emulate the active low state, the pins are configured as outputs"


Testing
        bcf     STATUS,RP0
	bcf	PORTB,7       ;<- "was" the only place I set B7
	bcf	STATUS,RP0

ActiveLow
	bsf	STATUS,RP0
	bcf	TRISB,7
	bcf	STATUS,RP0
	bcf	PORTB,7      ;<- this line is required, why?
	goto	Done

SetPassive
	bsf	STATUS,RP0
	bsf	TRISB,7
	bcf	STATUS,RP0

Done

Why does the Data Latch need to be reset each time?'

ON 20020416@4:08:32 AM at page:
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pJC-sprintmail-IA5 Paul J Cunningham edited the page

ON 20020416@6:26:27 PM at page:
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pJC-sprintmail-IA5 Paul J Cunningham edited the page