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    Date: Fri, 05 Nov 1999  23:48:38
    From: Dwayne Reid 
      To: PICLIST@MITVMA.MIT.EDU
 Subject: Re: 0-100 duty cycle at 15 Hz to a 0-5v analog
--------------------------------------------------------------------------------

Tracy Smith wrote:

>IIRC, Scott and Reggie provided enhanced versions of
>both of these. But Scott's no longer subscribed and I
>haven't seen anything from Reggie for quite some time.

I posted the orginal question and several very helpful souls found the
answer I am now using.  The core of the routine came from Scott Dattalo.  Enjoy!


The following is snipped from one of my messages to Scott:

BTW: the code works VERY well.  Its being used to measure the pulse duty
cycle ratio from Analog Devices TMP03 / 04 temperature sensors and can
resolve down to fractins of a degree (far more accuracy than the sensor).  I
cleaned the normalize part of the routine up slightly as follows at the end
of this message.

The entire measurement routine (wait for HI, wait for LO, measure LO,
measure HI, test for noisy signal, normalize everything, multiply HI pulse
by constant, divide by LO pulse, average 16 samples) takes about 400 code
spaces - left me lots of room for the rest of the project in a 12c508.



;up to 19 bit pulse timer with 3 cycle resolution
;concept by Scott Dattalo, this version by Dwayne Reid

;now measure HI period
    clrf        MH_low
    clrf        MH_mid
    clrf        MH_high         ;used as known zero for main loop

MH_loop
    btfss       PULSE
     goto       MH_1st

    movlw       1
    btfss       PULSE
     goto       MH_2nd

    addwf       MH_low,F
    btfss       PULSE
     goto       MH_3rd

    rlf         MH_high,W       ;get C into W (add 0 or 1 to next byte)
    btfss       PULSE
     goto       MH_4th

    addwf       MH_mid,F        ;add previous carry
    btfss       PULSE
     goto       MH_5th

;use either line below (not both)
    btfss       MH_mid,5        ;5=16 bits; 6=17 bits; 7=18 bits
;    skpc                        ; skpc=19 bits
     btfss      PULSE
      goto      MH_6th

    nop                         ;spare cycle!
    btfss       PULSE
     goto       MH_7th

    clrwdt

    btfsc       PULSE
     goto       MH_loop

MH_8th
    incf        MH_high,F       ;MH_high now used to accumulate LSBs

MH_7th
    incf        MH_high,F

MH_6th
    incf        MH_high,F

MH_5th                          ;use either line below (not both)
    btfsc       MH_mid,5        ;5=16 bits; 6=17 bits; 7=18 bits
;    skpnc                       ;skpnc=19 bits
      goto      overflow        ;
    subwf       MH_mid,F        ;undo increment, if any
    incf        MH_high,F

MH_4th
    incf        MH_high,F

MH_3rd
    decf        MH_low,F        ;undo increment
    incf        MH_high,F

MH_2nd
    incf        MH_high,F

MH_1st

;normalize high period
    movfw       MH_high         ;get LSB count into w
    clrf        MH_high         ;

    clrc                        ;make room for lower 3 LSBs
    rlf         MH_low,F        ;  (shift everything to the left 3 bits)
    rlf         MH_mid,F
    rlf         MH_high,F       ;

    rlf         MH_low,F
    rlf         MH_mid,F
    rlf         MH_high,F

    rlf         MH_low,F
    rlf         MH_mid,F
    rlf         MH_high,F       ;none of this affects LSB count in w

    iorwf       MH_low,F        ;put LSBs into low byte

;done!

Hope this helps.

dwayne


Dwayne Reid   
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
(780) 489-3199 voice          (780) 487-6397 fax

Celebrating 15 years of Engineering Innovation (1984 - 1999)

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