Sigma Delta Analog to Digital Converters

Ubicom SX Specific Sigma Delta Analog to Digital Conversion

Russell McMahon and Scott Dattalo say:

Here's an interim report on the Sigma-Delta Analog to Digital converter that I've been playing with. This provides a VERY low cost analog to digital converter subject to certain limitations.
I'm getting around 12-bits of dynamic range with the 2-I/O pin version and about 8 with the 1-I/O pin version.. better than on-chip 8 bit A2D converters. For results accuracies better than a few percent a true comparator or a gate with a stable and symmetric switching point is needed.
I am using a Z8 with an internal comparator but a PIC, AVR or other processor with comparator would work equally well. The trick I employed this time is a pre-charge algorithm. In other words, before beginning the actual a2d conversion I make sure that the voltage on the capacitor is right at the switching threshold of the pic I/O pin. {Re: using software to make a io port pin as repeatable as a comparitor}
Circuit

Designate processor pins as:

Output "Pfb" = feedback pin
Input: "Cin" = Comparator input state. Eliminated in 1 pin version

Resistor "Rin" [10K] from unknown voltage to comparator input.
Resistor "Rf" [10k] from Feedback pin to comparator pin.
Capacitor Cint from comparator pin to ground.0.56uF mylar film
                /-----<Pfb
                R
                R  Rf
                R
          Rin   |
Vin ----RRRRR---.------>Cin
                |
                -
                -
                |
               Gnd
Code:

Complete source for PIC
Assign register Low_Counter

Low_Counter = 0
Set Pfb low until Cin = low
Pfb high till Cin = hi
For N counts
  Set Pfb to complement of Cin
  If Cin = lo then increment Low_Counter
  Next N
Vin unknown is proportional to Low_Counter
Note: The time around the For/Next loop MUST be constant under all conditions (or else).
Outline:

I find the time constant of Rf//Ri plus Cint can have a major affect on accuracy - contrary to comments made by some others. I am currently using a 1uF (!) MKT capacitor but hope to reduce this for size and cost reasons. Increased resistor sizes (which affect the time constant in the same way as increased Cint) also have other affects so care is needed.
I'm getting about +/- 0.2% A2D resolution across a 2 volt range using a LM324 amplifier to amplify and shift a 0 - 0.2 volt signal to 1 - 3 volt approx. Using Z8 internal comparator. Using 2048 processor loops at 12uS per loop = 25 ms conversion time. There are all sorts of potential inaccuracies which are probably not easily addressed without significant extra expense. Reference is currently divided decoupled Vcc. Will probably zener regulate this to give enough stability for this application.
Higher accuracies SHOULD be possible with more conversion loops (and longer conversion time). I'm considering using a continuous conversion process where I hold records of say the last 8 conversions of 100 bits say (to 8 bits) and subtract these from a rolling 16 bit accumulator every time another 100 sample conversion is completed. This would allow, in this example, the equivalent of a tracking 8000 sample conversion with a new result available every 100 samples (every 1.2ms in this case). Whether the consequent affect on response is acceptable depends on your application.
A single 5v supply is used in this application - a higher voltage if available will give the 324 a higher common mode range and accordingly a higher converter range. The LM324 is not a nice op-amp - where cost is not an utterly driving factor (as it is here) then the use of a more normal op-amp is indicated. The LM324 does bad things when its output gets within about 0.6 volts of ground so I have "translated" the input voltage (0-0.2 volts in my case) up to about 1 volt and amplified it by a factor of about 10. Adding an external pulldown to the LM324's output assist its performance when approaching its lower limit. Spare amplifiers (if any) should be placed in a defined state - I'm connecting the inverting inputs to outputs and the non-inverting inputs to the reference voltage. This keeps the outputs defined and the inputs within the common mode range.
Changing the Z8 input over from a comparator to a std input pin produces a result about 10 times worse! - about +/- 2% accuracy! This demonstrates the advantages of the comparator.
For processors without a comparator a low cost result could be achieved with an LM339 comparator and LM324 op-amp. If the input voltage is 0 - 5 volts and low impedance relative to 10K then an input amplifier MAY be able to be avoided. Note that a non-zero impedance source will affect accuracy. The LM339 is also a less than ideal comparator but is slightly cheaper than a 324! In volume a 324 and 339 cost about $US0.30 plus passive R's and C's - the passives will form an appreciable part of the cost. This would provide up to 4 channels of 10bit (plus, probably) A2D.

Comments:

Says:

Microchip's application note AN700 gives some more detail on the implementation of a Sigma Delta A/D using a PIC http://ww1.microchip.com/downloads/en/AppNotes/00700a.pdf This is useful as it shows how to add another resistor to modify the input range to include negative and positive voltages.

A better document (IMO) is the Texas Instruments app note for their MSP range of micros. http://www-s.ti.com/sc/psheets/slaa104/slaa104.pdf

As explained in the TI document, the time constant is important for accuracy. The ripple voltage should be not more than 1 LSB per ADC cycle. The calculations to derive a suitable capacitance value are given within the app note.

One problem that these converters present is speed. Especial for the higher resolutions, conversion times can become significant, so it is important to optimise the ADC code to operate in as few cycles as possible. This also allows a lower value capacitor. The speed issue is not helped when you consider that the pre-charge time must be added to the conversion time, and near the ends of the ADC's range, the pre-charge can take a very significant amount of time. One possibility is to use a MOSFET switch to quickly charge the cap to the (buffered) reference voltage. However, this does increase complexity. Another option is to design the voltage input range to exceed the actual requirements by some degree, so that the converter is never operating at either extreme. Of course, the trade-off is lost resolution.

I have achieved ~12 bits of resolution from the comparators built into some of the newer parts such as the 16F627A and 16F88. The two comparators in these parts, plus the input multiplexor allows a 4 channel ADC to be built, each channel may have a different range. Providing the resistor values are kept reasonably high, a single PIC pin can drive the feedback/balancing arm on multiple converters with little or no loss of accuracy.