;
; ***************************************************************************
; ***  Bubble Software Parallax to PIC Source Converter. Copyright 1999.  ***
; ***  http://www.picnpoke.com                 email: sales@picnpoke.com  ***
; ***************************************************************************
;
;	***** Parallax PIC16Cxx Assembler PASM v4.5 'xx Test File *****
;
;			(formatted with 8-space tabs)
;
; NOTE: Assembler is case-insensitive, except within strings
;

;
;
; DEVICE directive - must preceed all other directives/instructions
; with the exception of INCLUDE
;
	P = pic16c74
	#include <16c74.inc>   ; processor assembler definitions
;
;
; Equates
;
expression  equ d'0'
fr   equ 0x00    ;0-7Fh
fr1   equ 0x00    ;0-7Fh
fr2   equ 0x00    ;0-7Fh
d   equ 0    ;0 or 1
             b   = 0                    ;0-07h <Microchip instruction>
bit   equ   fr.b  ;0-3FFh
bit1   equ  bit   ;0-3FFh
bit2   equ    bit+1 ;0-3FFh
port   equ 0x05    ;5, 6, or 7
literal   equ 0x00    ;0-0FFh
address   equ 0h    ;0-3FFh
;
;
; Directives
;
  id 'Fred'  ;Set device id to 'Fred'

symbol_2 = expression ;Equ aate symbol to a value

symbol_1 equ expression ;Same as =

  org expression ;Set code origin

  ds expression ;Define space in bytes

;		eeorg	expression	;Set data EEPROM origin

;		eedata	literal,literal	;Preload data EEPROM

		;include 'stuff.asm'	;Include another source file

		;end			;End assembly (optional)
;
;
; Data Types
;
             RETLW d'100'               ;decimal 100
             RETLW 0x27                 ;hex 27
             RETLW 0x00B6               ;hex B6
             RETLW b'10101110'          ;binary 10101110
             RETLW 'A'                  ;ASCII value 'A' (41h)
             RETLW $                    ;current origin
             RETLW %                    ;current eeprom origin

             DECFSZ fr                  ;use $ for delay loops, etc.
             GOTO $
             BTFSC fr,b                 
             GOTO $
;
;
; Operators and expressions (resolved strictly from left to right)
;
; . = BIT ADDRESS
; & = AND
; | = OR
; ^ = XOR
; + = ADD
; - = SUBTRACT
; * = MULTIPLY
; / = DIVIDE
; <<= SHIFT LEFT
; >>= SHIFT RIGHT
; < = HIGH BYTE
; > = LOW BYTE
;
             BSF fr,d'7'                ;BIT ADDRESS function
             MOVLW expression&7Fh       ;AND function
             IORLW expression|40h       ;OR function
             MOVLW 'X'^80h              ;XOR function
             MOVWF fr1
             INCF fr2+1                 ;ADD function
             MOVLW 62-expression        ;SUBTRACT function
             RETLW expression * 3       ;MULTIPLY function
             MOVLW expression/10h       ;DIVIDE function
             MOVLW expression<<5        ;SHIFT LEFT 5 bits
             MOVLW expression>>3        ;SHIFT RIGHT 3 bits
             MOVLW High expression      ;HIGH BYTE function
             MOVLW Low expression       ;LOW BYTE function
;
;
; Symbols can be up to 32 characters and may contain alpha, numeric, '_', and
; ':' characters.  They must not begin with a numeric character.
;
; Local symbols
;
Routine_1    MOVLW d'100'               ;A local symbol can be called
             MOVWF fr                   ;...within its regular-symbol
Routine_1_Loop  CALL Some_Routine       ;...boundary by its own name.
             DECFSZ fr                  
             GOTO Routine_1_Loop
             RETLW 0h                   

Routine_2    MOVLW d'200'               ;Local symbols can be used over
             MOVWF fr                   ;...and over again.
Routine_2_Loop  CALL Some_Routine       
             DECFSZ fr                  
             GOTO Routine_2_Loop
             RETLW 0h                   

Routine_3    MOVLW d'250'               ;A local symbol can be called
             MOVWF fr                   ;...outside its regular-symbol
             GOTO Routine_2_Loop        ;...boundary as shown.

Some_Routine RETLW 0h                   
;
;
; Using DS to allocate sequential variables
;
   org 0Ch ;Set variables' origin.
byte_variable_1  Res 1 ;List symbolic variables with length.
byte_variable_2  Res 1 ;This way, equate 'stacking' is avoided
byte_variable_3  Res 1 ;...in naming sequential variables.
word_variable_1  Res 2 ;Also, variables can be moved without
word_variable_2  Res 2 ;...typing new equate operands.
word_variable_3  Res 2 ;Of course, no code is generated.
string_variable  Res 8

   org 40h ;Now that variables are declared,
     ;...set up code origin.
;
;
; Using RETW to define complex strings
;
String       RETLW 'T'                  
             RETLW 'h'
             RETLW 'i'
             RETLW 's'
             RETLW ' '
             RETLW 's'
             RETLW 't'
             RETLW 'r'
             RETLW 'i'
             RETLW 'n'
             RETLW 'g'
             RETLW ' '
             RETLW 'h'
             RETLW 'a'
             RETLW 's'
             RETLW ' '
             RETLW 'a'
             RETLW 'n'
             RETLW ' '
             RETLW 'i'
             RETLW 'n'
             RETLW 'v'
             RETLW 'e'
             RETLW 'r'
             RETLW 't'
             RETLW 'e'
             RETLW 'd'
             RETLW ' '
             RETLW 'e'
             RETLW 'n'
             RETLW 'd'
             RETLW ' '
             RETLW 'c'
             RETLW 'h'
             RETLW 'r'
             RETLW '.'^80h
             RETLW 0FFh^d'9'^80h        
             RETLW 0FFh&d'10'&80h
             RETLW 0FFh^'T'             
             RETLW 'h'                  
             RETLW 'i'
             RETLW 's'
             RETLW ' '
             RETLW 's'
             RETLW 't'
             RETLW 'r'
             RETLW 'i'
             RETLW 'n'
             RETLW 'g'
             RETLW ' '
             RETLW 'h'
             RETLW 'a'
             RETLW 's'
             RETLW ' '
             RETLW 'a'
             RETLW 'n'
             RETLW ' '
             RETLW 'i'
             RETLW 'n'
             RETLW 'v'
             RETLW 'e'
             RETLW 'r'
             RETLW 's'
             RETLW 'e'
             RETLW 'd'
             RETLW ' '
             RETLW 'f'
             RETLW 'i'
             RETLW 'r'
             RETLW 's'
             RETLW 't'
             RETLW ' '
             RETLW 'c'
             RETLW 'h'
             RETLW 'r'
             RETLW '.'
             RETLW 'T'                  
             RETLW 'h'
             RETLW 'i'
             RETLW 's'
             RETLW ' '
             RETLW 's'
             RETLW 't'
             RETLW 'r'
             RETLW 'i'
             RETLW 'n'
             RETLW 'g'
             RETLW ' '
             RETLW 'e'
             RETLW 'n'
             RETLW 'd'
             RETLW 's'
             RETLW ' '
             RETLW 'w'
             RETLW 'i'
             RETLW 't'
             RETLW 'h'
             RETLW ' '
             RETLW '0'
             RETLW '.'
             RETLW d'0'
             RETLW d'1'                 
             RETLW 'T'
             RETLW 'h'
             RETLW 'i'
             RETLW 's'
             RETLW ' '
             RETLW 's'
             RETLW 't'
             RETLW 'r'
             RETLW 'i'
             RETLW 'n'
             RETLW 'g'
             RETLW ' '
             RETLW 's'
             RETLW 't'
             RETLW 'a'
             RETLW 'r'
             RETLW 't'
             RETLW 's'
             RETLW ' '
             RETLW 'w'
             RETLW 'i'
             RETLW 't'
             RETLW 'h'
             RETLW ' '
             RETLW '1'
             RETLW '.'
;
;
;********************************
;*				*
;*   PARALLAX INSTRUCTION SET	*
;*				*
;********************************
;
;
; Byte-oriented operations
;
             MOVLW literal              ;mov's
             MOVF fr,w                  
             MOVWF fr                   
             MOVLW literal              
             MOVWF fr
             MOVF fr2,w                 
             MOVWF fr1

             ADDLW literal              ;add's
             ADDWF fr,w                 
             ADDWF fr                   
             MOVLW literal              
             ADDWF fr
             MOVF fr2,w                 
             ADDWF fr1

             MOVLW literal-w            ;sub's
             SUBWF fr,w                 
             SUBWF fr                   
             MOVLW literal              
             SUBWF fr
             MOVF fr2,w                 
             SUBWF fr1

             ANDLW literal              ;and's
             ANDWF fr,w                 
             ANDWF fr                   
             MOVLW literal              
             ANDWF fr
             MOVF fr2                   
             ANDWF fr1

             IORLW literal              ;or's
             IORWF fr,w                 
             IORWF fr                   
             MOVLW literal              
             IORWF fr
             MOVF fr2,w                 
             IORWF fr1

             XORLW literal              ;xor's
             XORWF fr,w                 
             XORWF fr                   
             MOVLW literal              
             XORWF fr
             MOVF fr2,w                 
             XORWF fr1

             CLRW                       ;clear's
             CLRF fr                    

             INCF fr,w                  ;inc's
             INCF fr                    

             DECF fr,w                  ;dec's
             DECF fr                    

             RRF fr,w                   ;right shifts
             RRF fr                     

             RLF fr,w                   ;left shifts
             RLF fr                     

             SWAPF fr,w                 ;nibble swaps
             SWAPF fr                   

             XORLW 0xFF                 ;not's
             COMF fr,w                  
             COMF fr                    

             IORLW 0h                   ;test's
             MOVF fr                    
;
;
; Bit-oriented operations
;
             BCF fr,b                   ;bit set/clear's
             BCF status,c               
             BCF status,z               

             BSF fr,b                   
             BSF status,c               
             BSF status,z               

             BTFSC fr,b                 ;bit add/sub's
             INCF fr
             BTFSS fr,b                 
             INCF fr
             BTFSC fr,b                 
             DECF fr
             BTFSS fr,b                 
             DECF fr

             BTFSS fr+1,b               ;bit moves
             BCF fr,b
             BTFSC fr+1,b
             BSF fr,b
             BTFSC fr+1,b               
             BCF fr,b
             BTFSS fr+1,b
             BSF fr,b
;
;
; Inc/dec conditional branches
;
             INCFSZ fr,w                ;inc/dec with skip if zero
             INCFSZ fr                  
             INCFSZ fr                  
             GOTO address

             DECFSZ fr,w                
             DECFSZ fr                  
             DECFSZ fr                  
             GOTO address
;
;
; Compare-conditional branches
;
             MOVLW ~literal             ;compare skips
             ADDWF fr,w
             BTFSS status,c
             MOVF fr1,w                 
             SUBWF fr2,w
             BTFSC status,c
             MOVLW literal              
             SUBWF fr,w
             BTFSS status,c
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSS status,c
             MOVLW literal              
             SUBWF fr,w
             BTFSC status,c
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSC status,c
             MOVLW ~literal             
             ADDWF fr,w
             BTFSC status,c
             MOVF fr1,w                 
             SUBWF fr2,w
             BTFSS status,c
             MOVLW literal              
             SUBWF fr,w
             BTFSS status,z
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSS status,z
             MOVLW literal              
             SUBWF fr,w
             BTFSC status,z
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSC status,z

             MOVLW literal ^ 0xFFh      ;compare jumps
             ADDWF fr,w
             BTFSC status,c
             GOTO address
             MOVF fr1,w                 
             SUBWF fr2,w
             BTFSS status,c
             GOTO address
             MOVLW literal              
             SUBWF fr,w
             BTFSC status,c
             GOTO address
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSC status,c
             GOTO address
             MOVLW literal              
             SUBWF fr,w
             BTFSS status,c
             GOTO address
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSS status,c
             GOTO address
             MOVLW ~literal             
             ADDWF fr,w
             BTFSS status,c
             GOTO address
             MOVF fr1,w                 
             SUBWF fr2,w
             BTFSS status,c
             GOTO address
             MOVLW literal              
             SUBWF fr,w
             BTFSC status,z
             GOTO address
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSC status,z
             GOTO address
             MOVLW literal              
             SUBWF fr,w
             BTFSS status,z
             GOTO address
             MOVF fr2,w                 
             SUBWF fr1,w
             BTFSS status,z
             GOTO address
;
;
; Bit-conditional branches
;
             BTFSS fr,b                 ;bit skips
             BTFSS status,c             
             BTFSS status,z             

             BTFSC fr,b                 
             BTFSC status,c             
             BTFSC status,z             

             BTFSC fr,b                 ;bit jumps
             GOTO address
             BTFSC status,c             
             GOTO address
             BTFSC status,z             
             GOTO address

             BTFSS fr,b                 
             GOTO address
             BTFSS status,c             
             GOTO address
             BTFSS status,z             
             GOTO address
;
;
; Unconditional branches
;
             BTFSC 0x0A, 7h             ;skip

             GOTO address               ;jumps
             ADDWF pcl                  
             MOVWF pcl                  

             CALL address               ;call/return
             RETLW 0h                   
             RETLW 'S'                  
             RETLW 't'
             RETLW 'r'
             RETLW 'i'
             RETLW 'n'
             RETLW 'g'|80h

             RETFIE                     ;return from interrupt

             BCF 0x0A, 3h               ;long addressing
             GOTO address
             BCF 0x0A, 3h               
             GOTO address
             BCF 0x0A, 3h               
             CALL address


;
;
; I/O and control operations
;
             TRIS port                  ;tristate registers
             MOVLW literal              
             TRIS port
             MOVF fr,w                  
             TRIS port

             OPTION                     ;option register
             MOVLW literal              
             OPTION
             MOVF fr,w                  
             OPTION

             CLRWDT                     ;miscellaneous
             SLEEP                      

             NOP                        ;no operation
;
;
;********************************
;*				*
;*  MICROCHIP INSTRUCTION SET	*
;*				*
;********************************
;
               addwf fr,d               ;byte-oriented file <Microchip instruction>
               addwf fr,w               ;register operations <Microchip instruction>
               addwf fr                 ; <Microchip instruction>
               andwf fr,d               ; <Microchip instruction>
               andwf fr,w               ; <Microchip instruction>
               andwf fr                 ; <Microchip instruction>
               clrf fr                  ; <Microchip instruction>
               clrw                     ; <Microchip instruction>
               comf fr,d                ; <Microchip instruction>
               comf fr,w                ; <Microchip instruction>
               comf fr                  ; <Microchip instruction>
               decf fr,d                ; <Microchip instruction>
               decf fr,w                ; <Microchip instruction>
               decf fr                  ; <Microchip instruction>
               decfsz fr,d              ; <Microchip instruction>
               decfsz fr,w              ; <Microchip instruction>
               decfsz fr                ; <Microchip instruction>
               incf fr,d                ; <Microchip instruction>
               incf fr,w                ; <Microchip instruction>
               incf fr                  ; <Microchip instruction>
               incfsz fr,d              ; <Microchip instruction>
               incfsz fr,w              ; <Microchip instruction>
               incfsz fr                ; <Microchip instruction>
               iorwf fr,d               ; <Microchip instruction>
               iorwf fr,w               ; <Microchip instruction>
               iorwf fr                 ; <Microchip instruction>
               movf fr,d                ; <Microchip instruction>
               movf fr,w                ; <Microchip instruction>
               movf fr                  ; <Microchip instruction>
               movwf fr                 ; <Microchip instruction>
             NOP                        
               rlf fr,d                 ; <Microchip instruction>
               rlf fr,w                 ; <Microchip instruction>
               rlf fr                   ; <Microchip instruction>
               rrf fr,d                 ; <Microchip instruction>
               rrf fr,w                 ; <Microchip instruction>
               rrf fr                   ; <Microchip instruction>
               subwf fr,d               ; <Microchip instruction>
               subwf fr,w               ; <Microchip instruction>
               subwf fr                 ; <Microchip instruction>
               swapf fr,d               ; <Microchip instruction>
               swapf fr,w               ; <Microchip instruction>
               swapf fr                 ; <Microchip instruction>
               xorwf fr,d               ; <Microchip instruction>
               xorwf fr,w               ; <Microchip instruction>
               xorwf fr                 ; <Microchip instruction>

               bcf fr,b                 ;bit-oriented file <Microchip instruction>
               bcf bit                  ;register operations <Microchip instruction>
               bsf fr,b                 ; <Microchip instruction>
               bsf bit                  ; <Microchip instruction>
               btfsc fr,b               ; <Microchip instruction>
               btfsc bit                ; <Microchip instruction>
               btfss fr,b               ; <Microchip instruction>
               btfss bit                ; <Microchip instruction>

               addlw literal            ;literal and control <Microchip instruction>
               andlw literal            ;operations <Microchip instruction>
             CALL address               
               clrwdt                   ; <Microchip instruction>
               goto address             ; <Microchip instruction>
               iorlw literal            ; <Microchip instruction>
               movlw literal            ; <Microchip instruction>
               option                   ; <Microchip instruction>
               retfie                   ; <Microchip instruction>
               retlw literal            ; <Microchip instruction>
               return                   ; <Microchip instruction>
             SLEEP                      
               sublw literal            ; <Microchip instruction>
               tris port                ; <Microchip instruction>
               xorlw literal            ; <Microchip instruction>

               clrc                     ;special instructions <Microchip instruction>
               setc                     ; <Microchip instruction>
               clrdc                    ; <Microchip instruction>
               setdc                    ; <Microchip instruction>
               clrz                     ; <Microchip instruction>
               setz                     ; <Microchip instruction>
               skpc                     ; <Microchip instruction>
               skpnc                    ; <Microchip instruction>
               skpdc                    ; <Microchip instruction>
               skpndc                   ; <Microchip instruction>
               skpz                     ; <Microchip instruction>
               skpnz                    ; <Microchip instruction>
               tstf fr                  ; <Microchip instruction>
               movfw fr                 ; <Microchip instruction>
               negf fr,d                ; <Microchip instruction>
               negf fr,w                ; <Microchip instruction>
               negf fr                  ; <Microchip instruction>
               addcf fr,d               ; <Microchip instruction>
               addcf fr,w               ; <Microchip instruction>
               addcf fr                 ; <Microchip instruction>
               subcf fr,d               ; <Microchip instruction>
               subcf fr,w               ; <Microchip instruction>
               subcf fr                 ; <Microchip instruction>
               adddcf fr,d              ; <Microchip instruction>
               adddcf fr,w              ; <Microchip instruction>
               adddcf fr                ; <Microchip instruction>
               subdcf fr,d              ; <Microchip instruction>
               subdcf fr,w              ; <Microchip instruction>
               subdcf fr                ; <Microchip instruction>
               b address                ; <Microchip instruction>
               bc address               ; <Microchip instruction>
               bnc address              ; <Microchip instruction>
               bdc address              ; <Microchip instruction>
               bndc address             ; <Microchip instruction>
               bz address               ; <Microchip instruction>
               bnz address              ; <Microchip instruction>

             
             
             end