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Sender: "piclist-bounces@mit.edu" Date: Sat, 14 Aug 2021 06:20:00 -0700 Subject: Re: [EE] Tek DSO display issue? Thread-Topic: [EE] Tek DSO display issue? Thread-Index: AdeREHnJtZ0IGmkuSZq9i2El+AKY2w== Message-ID: References: <20210813073628.06a56fd6300ec2bfca6379d4e10ab8d2.b90cbbeb8f.wbe@email27.godaddy.com> List-Help: List-Subscribe: , List-Unsubscribe: , In-Reply-To: <20210813073628.06a56fd6300ec2bfca6379d4e10ab8d2.b90cbbeb8f.wbe@email27.godaddy.com> Reply-To: Microcontroller discussion list - Public. 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I searched digikey and mouser and I'm not finding many with characteristics quoted at Vgs of 5V or less. Of course I need all the other bells and whistles to - low Q, Rds, decent Vds (80V+) and Id (30A+). Maybe I'm not looking in the right place? On Sat, Aug 14, 2021 at 10:56 PM Jim wrote: > > > I can't see the picture, but if you have a large vds, that usually means > the FET is in the linear region, and not going into saturation. Try > using a pullup on the gate to a voltage higher than 5v so the FET goes > into saturation. There should be less than 1v vds when operating this > way. And your current gate connection can then pull the gate to g nd to > turn it off. If this gives operation that you're looking for, then you > either need to figure a way of getting a higher gate voltage, ior get a > different FET with lower gate threshold voltage to turn it fully on. > Something like the logic level FETs. > > Jim > > > > Regards, > > Jim > > > -------- Original Message -------- > > Subject: Re: [EE] Tek DSO display issue? > > From: Richard Prosser > > Date: Fri, August 13, 2021 6:12 am > > To: "Microcontroller discussion list - Public." > > > > > > Have you checked the decoupling caps on the MP24830 driver chip & its > > supply? The falling edge looks to have a bit of a slope to it. Also, ch= eck > > the snubber resistors & capacitors. What FET are you using ? 5V drive = may > > be marginal although it seems to be turning on OK, albeit with some rin= ging. > > Another place to check is the ground connection(s) & current paths for = the > > drive signal and the switched line & the snubbers. > > Your second photo may be showing artifacts of overloading the front en= d of > > the scope (in the 2V range). > > Is there any resistance in the gate drive circuit? Without it there may= be > > more RF oscillation than is apparent from the scope & this can increase= FET > > dissipation significantly. 10 ohms or so is usually enough. (The scope = lead > > capacitance may be reducing the RF as well - is it getting as hot with = the > > scope connected?). > > RP > > > > On Fri, 13 Aug 2021 at 17:13, K S wrote: > > > > > Help me PICLIST! > > > > > > I'm working on a buck converter and the main switching FET is heating > > > up plenty. To see what's going on I am measuring Vgs (purple) and Vds > > > (blue) with my trusty 20year old Tek TPS2014 - 4 isolated channels, > > > nice! > > > > > > See pic here: https://we.tl/t-t4t2USmkIU > > > > > > Vgs reaches just over 5V. I'm not too happy about that but it's what > > > the chip (MP24830) gives me and it should be just enough. To see what > > > I'm losing across in the FET I'm measuring Vds and hoping it's low > > > when the FET is on. So there are 2 shots in the pic, one with the > > > vertical scale set to 5V and the other at 2V/div. The 5V trace looks > > > beautiful, as expected. The 2V trace looks hmmm. Vds is shown clipped > > > in both cases; it reaches 48V. > > > > > > I'm noticing lots of funnies when I switch from 5V to 2V. I thought > > > I'd try something else: rather than measure volts directly across the > > > drain-source I thought I'd measure both the drain and source volts > > > w.r.t. GND and use the scope math function to get the difference. Wit= h > > > scales set to 5V/div I get what I'm expecting, with 2V the trace > > > disappears all together! I then tried this last experiment on a mate'= s > > > scope, also a Tek, TDS2022B, and got similar results. (I did try > > > across the FET itself with his scope but was getting FET misfirings - > > > I suspect that some small capacitive loading from this non-isolated > > > scope's inputs are causing some issues - I have many more pics if > > > anyone is interested). > > > > > > Anyone have any idea what might be happening here? > > > > > > TIA, > > > Kris. > > > -- > > > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > > > View/change your membership options at > > > http://mailman.mit.edu/mailman/listinfo/piclist > > > > > -- > > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > > View/change your membership options at > > http://mailman.mit.edu/mailman/listinfo/piclist > > -- > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .