From: Alan Pearce <kiwiantipodean@googlemail.com>
To: Microcontroller discussion list - Public. <piclist@mit.edu>
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Date: Sun, 13 Sep 2020 10:21:21 -0700
Subject: Re: [EE] Four Layer Routing Strategy
Thread-Topic: [EE] Four Layer Routing Strategy
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> - What do you do with through hole components?

well, they still have holes through the PCB as done in the past. If
one end is connected to power or ground then the via will connect to
the appropriate plane with thermal reliefs.

> - how do you deal with a surface mode power supply for the circuit board?
> You will have to place it on the top routing layer  but do you immediatel=
y
> get vias to the power layers?

Are you talking a prebuilt module here or are you looking at regulator
IC? Either way the manufacturer will generally have a recommended PCB
layout.

> - The vias crossing from the routing layers through the power layers, wil=
l
> this  not create other issues?

Depends on what you regard as issues. Yes on a high speed circuit such
as gigabit video then a via becomes a stub that imparts some extra
inductance that may have to be balanced out in some way, but such
signals are normally run as differential signals as they will be
impedance controlled. You talk of doing 500kHz bandwidth, but what is
your effective carrier frequency, or are you talking in terms of a
500kbaud signal? In the latter case i wouldn't expect vias to be a
problem, but if you are working with a higher frequency carrier then
you may need to be more careful with routing.

The thing with vias going through power layers is to make sure you set
up your constraints so that there is sufficient clearance around the
via that production tolerances don't produce a short to the plane due
to drilling tolerances. And ALWAYS use thermal reliefs to any plane or
fill on any layer.


On Sun, 13 Sep 2020 at 13:29, Luis Moreira
<luis.moreira1575@googlemail.com> wrote:
>
> Hi All,
> I've been doing a bit of PCB layout lately, I'm actually doing a 500KHZ
> bandwidth analogue optical link at the moment. Obviously noise issues are
> very high on my list of issues to avoid.
> The layout strategy you are describing seems very good, but I gave a few
> questions:
>
> - What do you do with through hole components?
>
> - how do you deal with a surface mode power supply for the circuit board?
> You will have to place it on the top routing layer  but do you immediatel=
y
> get vias to the power layers?
>
> - The vias crossing from the routing layers through the power layers, wil=
l
> this  not create other issues?
>
> On a sightly different subject, on a two layer board I tend to run power
> and routing on the top layer and ground layer mostly as a copper poor on
> the bottom layer, is this best practice?
>
> Thank you.
> Best Regards
>                Luis
>
> On Sun, 13 Sep 2020, 12:57 Alan Pearce, <kiwiantipodean@googlemail.com>
> wrote:
>
> > > Ok, sounds like keeping the inner layers as ground and 3.3V separatel=
y
> > > will be the best. No problems there.
> >
> > That is the 'normal' way to do it. And using manhattan routing gives
> > you a good starting point. Once you have the board routed you can look
> > to see where the routing can be tweaked to minimise vias.
> >
> > > One thing about planes though, I once read an article about being
> > > careful using planes, that essentially small ground loops could form
> > > in them.
> >
> > Opinion on this has gone back and forth like a leaf in the wind, but
> > one of the most authoritative texts I have seen was an appnote or
> > article from ADI which advocated having one complete ground plane with
> > minimal distinction between digital and analogue ground. It doesn't
> > mean you could mix the digital and analogue parts willy nilly, some
> > care is still needed with relative parts placement.
> >
> > On Sun, 13 Sep 2020 at 02:57, Josh Koffman <joshybear@gmail.com> wrote:
> > >
> > > Thank you all for the advice!
> > >
> > > Ok, sounds like keeping the inner layers as ground and 3.3V separatel=
y
> > > will be the best. No problems there.
> > >
> > > One thing about planes though, I once read an article about being
> > > careful using planes, that essentially small ground loops could form
> > > in them. Since then I've always had my planes as a separate net (ie
> > > not ground), and I connected them to the ground traces strategically.
> > > Each area of pour had only one connection to ground.
> > >
> > > Should I be using the pours a bit more liberally and letting them joi=
n
> > > all the pins on that actual net? That's easily done (actually easier
> > > than the way I have been doing it). I'd add thermals in to try to hel=
p
> > > make it easier to solder.
> > >
> > > The board service I've been using lately doesn't allow for
> > > blind/buried vias without a hefty upcharge. I am definitely not at
> > > that level, that's for sure!
> > >
> > > Thank you!
> > >
> > > Josh
> > > --
> > > A common mistake that people make when trying to design something
> > > completely foolproof is to underestimate the ingenuity of complete
> > > fools.
> > >         -Douglas Adams
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