From: David C Brown <dcb.home@gmail.com>
To: Microcontroller discussion list - Public. <piclist@mit.edu>
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Date: Fri, 5 Jun 2020 03:56:33 -0700
Subject: Re: [EE] Detecting a change of level on four lines with digital
	logic/analog circuitry?
Thread-Topic: [EE] Detecting a change of level on four lines with digital
	logic/analog circuitry?
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If you use the solution proposed by fForest and amendment by me you would
be OK..  Each XOR gate output would be a pulse and you are ORing them so
even if tow changed together you would get a pulse out of the or gate
__________________________________________
David C Brown
43 Bings Road
Whaley Bridge
High Peak                           Phone: 01663 733236
Derbyshire                eMail: dcb.home@gmail.com
SK23 7ND          web: www.bings-knowle.co.uk/dcb
<http://www.jb.man.ac.uk/~dcb>



*Sent from my etch-a-sketch*


On Fri, 5 Jun 2020 at 11:44, Jason White <whitewaterssoftwareinfo@gmail.com=
>
wrote:

> Hello Brent,
>
> It's a good idea and I wish I could do it. But there's a problem that I
> haven't reconciled - under many circumstances the inputs can change at th=
e
> exact same time with the exact same slew rate and cancel out.
>
> Am I correct in thinking that for this implementation to avoid signals
> canceling out I would have to set the summing coefficients for each
> resistor to be different such that cancelation is not possible. I would e=
nd
> up with 16 unique voltage levels, one per combination.
>
> Almost seems like an R2R ladder similar to a DAC in conjunction with two
> comparators might be an option. An RC could provide a slow moving referen=
ce
> voltage to the two comparators.
>
> Am I thinking correctly about that particular implementation?
>
> On Thursday, June 4, 2020, Brent Brown <brent@eds.co.nz> wrote:
>
> > Hi Jason,
> >
> > How about: Sum the lines with 4 x resistors, feed this analog voltage
> into
> > the +ve
> > input of one comparator, and -ve input of another comparator. Remaining
> > inputs to
> > a C, with R to analog voltage above, where RC time constant sets pulse
> > period.
> > Combine comparator outputs with 2 x diodes and a pull-up or pull-down
> > resistor as
> > required.
> >
> > Brent.
> >
> > On 4 Jun 2020 at 16:35, Jason White wrote:
> >
> > > Hi everyone,
> > >
> > > I have an application where I need to generate at pulse least 1
> > microsecond
> > > long any time a rising or falling edge is detected on four digital
> lines.
> > > The four signals can change at any time to any direction. The pulse i=
s
> > used
> > > to trigger a timer providing a reset signal to the rest of the system=
..
> > > Microcontrollers and programmable logic devices aren't allowed.
> > >
> > > Four 74HC123s will do it, but are too big.
> > > Four window comparators monitoring the signal through an RC will do i=
t,
> > but
> > > also seems too big.
> > >
> > > Is four schmitt trigger XOR gates with four RC's the smallest
> > > implementation?
> > >
> > > I was thinking some sort of analog implementation might be able to do
> it
> > > smaller. But AC coupling the four signals together would allow them t=
o
> > > cancel out. Perhaps a 4-bit encoder/decoder or multiplexer might do i=
t
> > > better?
> >
> >
> > --
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> >
>
>
> --
> Jason White
> --
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