From: David C Brown <dcb.home@gmail.com>
To: Microcontroller discussion list - Public. <piclist@mit.edu>
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Date: Thu, 4 Jun 2020 23:57:56 -0700
Subject: Re: [EE] Detecting a change of level on four lines with digital
	logic/analog circuitry?
Thread-Topic: [EE] Detecting a change of level on four lines with digital
	logic/analog circuitry?
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How much latency is acceptable.  And is the output pulse retriggerable.

Would using an 8 pin PIC to sample and digitally compare the inputs be too
slow?
With a 32MHz part you would be able  to keep the latency under a micro
second.
__________________________________________
David C Brown
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*Sent from my etch-a-sketch*


On Thu, 4 Jun 2020 at 21:38, Jason White <whitewaterssoftwareinfo@gmail.com=
>
wrote:

> Hi everyone,
>
> I have an application where I need to generate at pulse least 1 microseco=
nd
> long any time a rising or falling edge is detected on four digital lines.
> The four signals can change at any time to any direction. The pulse is us=
ed
> to trigger a timer providing a reset signal to the rest of the system.
> Microcontrollers and programmable logic devices aren't allowed.
>
> Four 74HC123s will do it, but are too big.
> Four window comparators monitoring the signal through an RC will do it, b=
ut
> also seems too big.
>
> Is four schmitt trigger XOR gates with four RC's the smallest
> implementation?
>
> I was thinking some sort of analog implementation might be able to do it
> smaller. But AC coupling the four signals together would allow them to
> cancel out. Perhaps a 4-bit encoder/decoder or multiplexer might do it
> better?
>
> Regards,
> Jason White
> --
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