Received: from PCH.mit.edu (18.7.21.50) by mail.efplus.com (192.168.0.8) with Microsoft SMTP Server (TLS) id 8.3.485.1; Mon, 20 Apr 2020 02:17:34 -0700 Received: from PCH.MIT.EDU (localhost.localdomain [127.0.0.1]) by PCH.mit.edu (8.14.7/8.12.8) with ESMTP id 03K96Qap022256; Mon, 20 Apr 2020 05:06:49 -0400 Received: from outgoing-exchange-3.mit.edu (OUTGOING-EXCHANGE-3.MIT.EDU [18.9.28.13]) by PCH.mit.edu (8.14.7/8.12.8) with ESMTP id 03K96P3B022253 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Mon, 20 Apr 2020 05:06:25 -0400 Received: from oc11exedge1.exchange.mit.edu (OC11EXEDGE1.EXCHANGE.MIT.EDU [18.9.3.17]) by outgoing-exchange-3.mit.edu (8.14.7/8.12.4) with ESMTP id 03K9718w017847 for ; Mon, 20 Apr 2020 05:07:02 -0400 Received: from w92expo29.exchange.mit.edu (18.7.74.41) by oc11exedge1.exchange.mit.edu (18.9.3.17) with Microsoft SMTP Server (TLS) id 15.0.1293.2; Mon, 20 Apr 2020 05:06:15 -0400 Received: from oc11exhyb7.exchange.mit.edu (18.9.1.112) by w92expo29.exchange.mit.edu (18.7.74.41) with Microsoft SMTP Server (TLS) id 15.0.1365.1; Mon, 20 Apr 2020 05:06:24 -0400 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (104.47.58.108) by oc11exhyb7.exchange.mit.edu (18.9.1.112) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Mon, 20 Apr 2020 05:06:24 -0400 Received: from MWHPR1701CA0019.namprd17.prod.outlook.com (2603:10b6:301:14::29) by CY4PR01MB2646.prod.exchangelabs.com (2603:10b6:903:e9::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2921.25; Mon, 20 Apr 2020 09:06:22 +0000 Received: from CO1NAM03FT004.eop-NAM03.prod.protection.outlook.com (2603:10b6:301:14:cafe::8) by MWHPR1701CA0019.outlook.office365.com (2603:10b6:301:14::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2921.25 via Frontend Transport; Mon, 20 Apr 2020 09:06:22 +0000 Received: from cedar.nocdirect.com (69.73.180.175) by CO1NAM03FT004.mail.protection.outlook.com (10.152.80.154) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2921.25 via Frontend Transport; Mon, 20 Apr 2020 09:06:21 +0000 Received: from 25.16.187.81.in-addr.arpa ([81.187.16.25]:40319 helo=[10.0.0.28]) by cedar.nocdirect.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.93) (envelope-from ) id 1jQSNf-0001Y4-Pd for piclist@mit.edu; Mon, 20 Apr 2020 05:06:19 -0400 From: John Lawton To: "piclist@mit.edu" Sender: "piclist-bounces@mit.edu" Date: Mon, 20 Apr 2020 02:06:18 -0700 Subject: Re: [EE] LDO reg keeps failing. Looking for suggestions. Thread-Topic: [EE] LDO reg keeps failing. Looking for suggestions. Thread-Index: AdYW9Ic76zxTJq7cQiKX/5Vf90ekAQ== Message-ID: References: <20200420073653.GL12237@laptop.org> List-Help: List-Subscribe: , List-Unsubscribe: , In-Reply-To: Reply-To: Microcontroller discussion list - Public. Accept-Language: en-US Content-Language: en-GB X-MS-Exchange-Organization-AuthAs: Anonymous X-MS-Exchange-Organization-AuthSource: TS500.efplus4.local X-MS-Has-Attach: X-Auto-Response-Suppress: All X-MS-Exchange-Organization-SenderIdResult: Pass X-MS-Exchange-Organization-PRD: mit.edu X-MS-TNEF-Correlator: received-spf: None (protection.outlook.com: jle.co.uk does not designate permitted sender hosts) dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mitprod.onmicrosoft.com; s=selector2-mitprod-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jzXpUcdJg3SxcLANAuSyaZBg7GrIpa/lkACtqS18uSU=; b=a6ubz2RmkIYx9JQQE5T8a3Yha2bfP4hV5iY/fdevi8CatZcT0CAGJAXApuxQbjxmdL7uzuvFRHsAXF1/nD5+qgpQuO0Mb5T7NL1W06KqAJ+jThlS28M3pi2x/U5YiykMz97fcepB69cxVrJ3N5PJd3eGDtfPSZBUA7dn2lOvZvk= authentication-results: spf=none (sender IP is 69.73.180.175) smtp.mailfrom=jle.co.uk; mit.edu; dkim=none (message not signed) header.d=none;mit.edu; dmarc=none action=none header.from=jle.co.uk; user-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 errors-to: piclist-bounces@mit.edu list-id: "Microcontroller discussion list - Public." list-post: x-beenthere: piclist@mit.edu x-mailman-version: 2.1.6 x-source-args: x-source-dir: x-antiabuse: Sender Address Domain - jle.co.uk x-source: x-authenticated-sender: cedar.nocdirect.com: piclist@jle.co.uk x-topics: [EE] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 James, looking at the datasheet for the LDO, the recommended output capacitor=20 is 1uF - 22uF ceramic (low ESR) so 100nF doesn't cut it. I would always recommend using the vendor's typical application circuit=20 as a basis for my design. To prevent the regulator seeing a droop in the input supply, add a=20 series diode and reservoir capacitor on the regulator input, so if the=20 motor turn on surge droops the supply, the series diode will stop=20 conducting and the reservoir capacitor will continue to feed the=20 regulator. Use a reservoir capacitor somewhat larger than the regulator=20 output capacitor. John On 20/04/2020 09:31, James Burkart wrote: > Thanks James. I'll try a schottky diode between the LDO and filter cap. > > On Mon, Apr 20, 2020, 1:37 AM James Cameron wrote: > >> Looking at your schematic, when Q2 or Q4 conduct, there may be a time >> during which VCC will fall below VDD. >> >> I've had this happen in exciting ways once before, with C1 catching >> fire, and the fix that worked for me was a diode between VCC and >> C1/U2. >> >> On Mon, Apr 20, 2020 at 01:06:24AM -0600, James Burkart wrote: >>> VDD is 5V, and it's provided by the LDO regulator. VCC is the battery >>> voltage and is anywhere from 6.5 to 8.2V. I don't know what circumstanc= es >>> would lead to VCC dropping below VDD. Could you shed some light on this= ? >>> >>> On Mon, Apr 20, 2020, 12:25 AM David VanHorn >> wrote: >>>> If vcc can rise above the input then most pnp regulators will fail >>>> >>>> >>>> On Sun, Apr 19, 2020, 11:44 PM James Burkart >>> wrote: >>>> >>>>> Hey everyone! Here's a little motor driver board I made that works >> great, >>>>> until it doesn't. The voltage regulator keeps failing on me. I've >> used a >>>>> couple different LDO regulators and it always happens. It's always at >>>>> random times. So I am pretty sure it's EMI from the brushed motors. >> If >>>>> someone here has a few minutes, could you look over my schematic and >>>>> recommend changes? >>>>> >>>>> The board is powered from a 2S lipo, so 6.5 to 8.2V. For the flywheel >>>>> output there are 2 motors in parallel that draw about 3A total when >>>>> running, and a stall current of about 20A. The pusher output runs 1 >> motor >>>>> that draws about 100mA with a stall current of about 3A. I do use >> PWM to >>>>> control the speed of the pusher motor. >>>>> >>>>> If you're wondering, this driver board is for flywheel Nerf blasters. >>>>> >>>>> -- >>>>> Sincerely, >>>>> >>>>> James Burkart >>>>> *925.667.7175* >>>>> >>>>> *Schematic:* >>>>> https://drive.google.com/file/d/1dgLf3sFNzFxvEuzaqTuIHd4_VSUfNbg8 >>>>> -- >>>>> http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive >>>>> View/change your membership options at >>>>> http://mailman.mit.edu/mailman/listinfo/piclist >>>>> >>>> -- >>>> http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive >>>> View/change your membership options at >>>> http://mailman.mit.edu/mailman/listinfo/piclist >>>> >>> -- >>> http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive >>> View/change your membership options at >>> http://mailman.mit.edu/mailman/listinfo/piclist >> -- >> James Cameron >> http://quozl.netrek.org/ >> -- >> http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive >> View/change your membership options at >> http://mailman.mit.edu/mailman/listinfo/piclist >> --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .