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Sender: "piclist-bounces@mit.edu" Date: Thu, 6 Feb 2020 03:32:32 -0800 Subject: Re: [EE] 78L05 (SO8) overshoot on removal of over-current event? Thread-Topic: [EE] 78L05 (SO8) overshoot on removal of over-current event? Thread-Index: AdXc4uVLmbtEq9F0TjuONohdiWvujw== Message-ID: References: <20200206042012.200670zz9eqi3oss@webmail.ca.inter.net> List-Help: List-Subscribe: , List-Unsubscribe: , In-Reply-To: <20200206042012.200670zz9eqi3oss@webmail.ca.inter.net> Reply-To: Microcontroller discussion list - Public. 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While they don't totally confirm my observation they definitely suggest that the overshoot is possible. I recall the the 78L05 had only a 100nF ceramic output capacitor (unknown voltage and dielectric) situated directly next to it. It had perhaps 110uf of input capacitance mixed between electrolytic and ceramic. The >100mA load was applied for 1 second and removed for 1 second with a fast rising and falling edges - on removal of the load, micro-controller failure (smoke) would occur. The PCB was 2 layer and measured roughly 4"x6". The regulator was all the way to one side (bottom right) while the 5V load (micro-controller, optocouplers, transistors, LEDs, etc.) was distributed all over the PCB, mostly toward the other side (top left). Being a 2 layer PCB, there was probably very little continuous power/ground plane. Perhaps trace inductance did play a role in the instability and overshoot. -Jason White On Thu, Feb 6, 2020 at 4:26 AM wrote: > Hi, Jason: > > Just out of curiosity I tested a 78L06 with a AO3400 MOSFET applying > and removing a 20 ohm load (causing the output voltage to drop to about 4= ..5V) > Input capacitor 1uF 1206 ceramic X7R > > With an output capacitor of 100nF the overshoot was about half a volt. > With 1uf it was less- about 300mV with a duration of about 25us. > > If I remove the capacitor entirely I can see a huge overshoot. > > Rise & fall times of the order of 75ns. > > Of course a fast fall-time load with layout inductance can lead to > a voltage spike on the board if there are not bypass capacitors > properly situated to absorb the energy stored in the inductance. > The fault current can be in the hundreds of mA, so a relatively > large capacitance (hundreds of nF or 1uF) would be good. > > Best regards, > Spehro Pefhany --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .