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Sender: "piclist-bounces@mit.edu" Date: Wed, 8 Jan 2020 00:19:03 -0800 Subject: Re: [EE]: LTSpice Question Thread-Topic: [EE]: LTSpice Question Thread-Index: AdXF/fPkCfAuepAWR/GHr1wf8a5wmg== Message-ID: References: <20200107125557.06a56fd6300ec2bfca6379d4e10ab8d2.0d7b2e735f.wbe@email27.godaddy.com> List-Help: List-Subscribe: , List-Unsubscribe: , In-Reply-To: Reply-To: Microcontroller discussion list - Public. Accept-Language: en-US X-MS-Exchange-Organization-AuthAs: Anonymous X-MS-Exchange-Organization-AuthSource: TS500.efplus4.local X-MS-Has-Attach: X-Auto-Response-Suppress: All X-MS-Exchange-Organization-SenderIdResult: Pass X-MS-Exchange-Organization-PRD: mit.edu X-MS-TNEF-Correlator: received-spf: Pass (protection.outlook.com: domain of gmail.com designates 209.85.208.46 as permitted sender) receiver=protection.outlook.com; client-ip=209.85.208.46; helo=mail-ed1-f46.google.com; dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cornell.edu; s=g.20171207; h=mime-version:references:in-reply-to:from:date:message-id:subject:to; bh=exgZQZp9M4qyBUkRY0DQrHnljiJLE9/nHXtAVQ5/vhs=; b=GmKq4UFbNLS241wRmfFQ6zNnKuQEdQTnaN12ViYpbN88I1OsZMbTbJF7fIU3M2U0GK 24N6Zt+wBQ0LWDimk4WrX4n2VLQP6zqW9HmzLcd4mHaAsrgS0PneSsqgw1MsdA+BHdok pEdVBYKVbYkVXaDllFTorxaqRCVlZW96RQwezUnt44lXD3WnoOtBs0qwcN6MoQxpDm7I JK3VJSsFniJrJsBg/yW8Yy0LyBSJMz/BCu9cICvaAELs8XMsAXyIBiytnsy94PVVLhAA r3mgIUb3FrKpzkzowxpSx4CLEfY7dBhUHE1Y3vGGyxqNfoLl/yuyS1uUblLFN7Ox4REN jbrA== authentication-results: spf=pass (sender IP is 209.85.208.46) smtp.mailfrom=gmail.com; mit.edu; dkim=pass (signature was verified) header.d=cornell.edu;mit.edu; dmarc=pass action=none header.from=cornell.edu;compauth=pass reason=100 errors-to: piclist-bounces@mit.edu list-id: "Microcontroller discussion list - Public." list-post: x-beenthere: piclist@mit.edu x-mailman-version: 2.1.6 x-received: by 2002:aa7:df89:: with SMTP id b9mr4044386edy.99.1578471554989; Wed, 08 Jan 2020 00:19:14 -0800 (PST) x-topics: [EE] x-content-filtered-by: Mailman/MimeDel 2.1.6 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 I think that you would need to either manually enter parameters for a depletion mode MOSFET into an instance of one of the MOSFET simulation models or (as Bob suggested) get a model for a depletion mode MOSFET online= .. As Bob also pointed out, JFETs are inherently depletion-mode devices. I once had a reason to use a depletion-mode device in a commercial design. To ensure a clean reset behavior, we wanted to make sure that the capacitance on an internal bus of the device would be fully discharged quickly in the event of power loss, but without adding any additional current drain under normal circumstances. Using a JFET was a nice solution to this because we could just bias the gate into pinchoff (the OFF state) during normal operation but on loss of power, the gate would float and the drain-source connection would look like a fairly low (about 1k ohm) resistor. On Tue, Jan 7, 2020 at 6:30 PM Ryan O'Connor wrote: > Looking forward to later hearing about a practical reason to use depletio= n > mode mosfets! > > Ryan > > On Wed, 8 Jan 2020 at 09:00, Jim wrote: > > > > > All, > > > > I have a need to simulate a circuit using a Depletion Mode MOSFET usin= g > > LTSpice. > > I have looked at the list of MOSFETs included in the application, but = I > > don't see any Depletion Mode FETs. > > Does anyone have any idea what part number in LTSpice could be a > > Depletion Mode MOSFET? Or does anyone have a model of > > an N Channel Depletion Mode MOSFET that will run under LTSpice? > > The parameters of the particular part number aren't an important issue > > at this time. I just need a functional model > > for a quick proof of concept for a new circuit for a new product at > > work. I can't elaborate on this further at the > > moment, but later, if all works out, I'll let everyone know that is > > interested what the circuit is intended to do, and > > if it does what it's supposed to. > > > > Anyway, if anyone knows if any of the MOSFET part numbers listed in > > LTSpice are Depletion Mode FET's, please let me > > know. > > > > > > Thanks and Regards, > > > > Jim > > > > > > -- > > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > > View/change your membership options at > > http://mailman.mit.edu/mailman/listinfo/piclist > > > -- > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .