Ethernet is disabled also: // PIC32MX795F512L Configuration Bit Settings // 'C' source line config statements // DEVCFG3 #pragma config USERID =3D 0xFFFF // Enter Hexadecimal value (Enter= Hexadecimal value) #pragma config FSRSSEL =3D PRIORITY_7 // SRS Select (SRS Priority 7) #pragma config FMIIEN =3D OFF // Ethernet RMII/MII Enable (RMII= Enabled) #pragma config FETHIO =3D OFF // Ethernet I/O Pin Select (Alter= nate Ethernet I/O) #pragma config FCANIO =3D OFF // CAN I/O Pin Select (Alternate = CAN I/O) #pragma config FUSBIDIO =3D OFF // USB USID Selection (Controlled= by Port Function) #pragma config FVBUSONIO =3D ON // USB VBUS ON Selection (Control= led by USB Module) // DEVCFG2 #pragma config FPLLIDIV =3D DIV_2 // PLL Input Divider (2x Divider) #pragma config FPLLMUL =3D MUL_20 // PLL Multiplier (20x Multiplier= ) #pragma config UPLLIDIV =3D DIV_12 // USB PLL Input Divider (12x Div= ider) #pragma config UPLLEN =3D OFF // USB PLL Enable (Disabled and B= ypassed) #pragma config FPLLODIV =3D DIV_1 // System PLL Output Clock Divide= r (PLL Divide by 1) // DEVCFG1 #pragma config FNOSC =3D PRIPLL // Oscillator Selection Bits (Pri= mary Osc w/PLL (XT+,HS+,EC+PLL)) #pragma config FSOSCEN =3D OFF // Secondary Oscillator Enable (D= isabled) #pragma config IESO =3D OFF // Internal/External Switch Over = (Disabled) #pragma config POSCMOD =3D HS // Primary Oscillator Configurati= on (HS osc mode) #pragma config OSCIOFNC =3D OFF // CLKO Output Signal Active on t= he OSCO Pin (Disabled) #pragma config FPBDIV =3D DIV_8 // Peripheral Clock Divisor (Pb_C= lk is Sys_Clk/2) // !!! NOTE SPI seems to break (always busy in 32 bit mode) if DIV_4 or=20 // DIV_2 selected. #pragma config FCKSM =3D CSDCMD // Clock Switching and Monitor Se= lection (Clock Switch Disable, FSCM Disabled) #pragma config WDTPS =3D PS1048576 // Watchdog Timer Postscaler (1:1= 048576) #pragma config FWDTEN =3D OFF // Watchdog Timer Enable (WDT Dis= abled (SWDTEN Bit Controls)) // DEVCFG0 #pragma config DEBUG =3D OFF // Background Debugger Enable (De= bugger is disabled) #pragma config ICESEL =3D ICS_PGx2 // ICE/ICD Comm Channel Select (I= CE EMUC2/EMUD2 pins shared with PGC2/PGD2) #pragma config PWP =3D OFF // Program Flash Write Protect (D= isable) #pragma config BWP =3D OFF // Boot Flash Write Protect bit (= Protection Disabled) #pragma config CP =3D OFF // Code Protect (Protection Disab= led) -- David VanHorn Lead Hardware Engineer Backcountry Access, Inc. 2820 Wilderness Pl, Unit H Boulder, CO =A080301 USA phone:=A0303-417-1345 =A0x110 email:=A0david.vanhorn@backcountryaccess.com=A0 -----Original Message----- From: piclist-bounces@mit.edu On Behalf Of Alan P= earce - UKRI STFC Sent: Thursday, November 7, 2019 2:45 AM To: Microcontroller discussion list - Public. Subject: RE: [PIC] Configuring a pin for input As others have said, you didn't state which processor - but seeing that you= are quoting 32 bit values for ports I suspect it is a PIC32. But the bigger and more recent processors have multiple registers that cont= rol analogue functions on pins. I have no experience with PIC32 on this. Another possibility is does the chip have JTAG capability, because that has= a higher priority over the pins that normal operation unless you disable i= t - at least on 16 bit parts, again no experience with PIC32. Seeing you are actively debugging I take it the pin isn't part of a Debug p= in set that is configured as the debug port. -----Original Message----- From: piclist-bounces@mit.edu On Behalf Of David = Van Horn Sent: 06 November 2019 23:03 To: Microcontroller discussion list - Public. Subject: [PIC] Configuring a pin for input I'm having what seems a pretty bizarre problem. I'm using bit 14 of port A as an input to tell me when I need to pick up da= ta from an ADC. I am absolutely sure the pin is toggling low, but when I read the pin it's = always 1 in the port register. I'm aware of the AD1PCFG register which could cause this, but AFAIK that on= ly affects PORTB Fortunately, I'm using the PICKit4 ICE, so I can see the r= egister states as commented below. My init routine sets TRISA bit 14 high, and that's all that should matter.. What would cause bit 14 of PORTA to always read high when the pin itself is= low? int ADC_Check_Data() { int temp =3D 0; temp =3D PORTA; // Get the pin states // temp =3D 0x0000C0FF at this point, bit 14 is high though the pin its= elf is LOW. temp &=3D (1 << 14); // mask off all but bit 14 // Here I always get 0x00004000 Bit 14 is HIGH when the pin itself is L= OW. // AT THIS MOMENT: // LATA =3D 0x0000C0FF // ODCA =3D 0x00000000 // PORTA =3D 0x0000C0FF (shows bit 14 =3D HIGH) // TRISA =3D 0x0000C0FF (shows bit 14 as INPUT) // Low =3D data ready for reading. if (0 =3D=3D temp) { return 1; } else { return 0; } } -- David VanHorn Lead Hardware Engineer Backcountry Access, Inc. 2820 Wilderness Pl, Unit H Boulder, CO 80301 USA phone: 303-417-1345 x110 email: david.vanhorn@backcountryaccess.com -- http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/chang= e your membership options at http://mailman.mit.edu/mailman/listinfo/piclis= t -- http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/chang= e your membership options at http://mailman.mit.edu/mailman/listinfo/piclis= t --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .