On Fri, 30 Aug 2019 at 09:05, Jason White wrote: > My application is space and power constrained. Is there a logic gate that does not exhibit this behavior? (100uA in the undefined would be much more acceptable than 45mA) Maybe a schmitt trigger would be designed to > > > A Schmitt triggered gate is the obvious solution, as you and others have noted. Below I describe an extremely 'naughty' concept which may be able to be made to work deep-ending on overall situation. This arrangement - may not work at all - may be an utter disaster - may be able to be made to work extremely well Odds are the naughtiness factor exceeds the levels acceptable in a real world design :-). "" Solution """: Add a 'suitably sized' resistor in the IC's Vdd line. Greatly increased current drain will lower the IC's Vdd thus increasing the relative voltage of the inputs relative to the IC. Reduction of current drain will restore the voltages so there is a potential for oscillation depending on time constants. (This "works", if at all, on rising input waveforms. A resistor in the Vss line will achieve a similar result with falling inputs. Both at once (probably) don't work for equal sized resistors. Assymetric sizing may work in both directions in some cases but, by then magic is probably safer). I have never tried this with an IC. But I have successfully added hysteresis in a transistor based circuit by adding a small resistor in a current path and using the small pedestal to raise a switching voltage level elsewhere. Not a formal Schmitt per se. In that case the solution was 'almost elegant' rather than 'naughty' and produced superb results with astonishingly small levels of hysteresis for the results achieved. (ie calculation suggested that the level that worked was far smaller than would be expected to be effective. Russell --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .