Hi James, The only PICs that it is allowed on are the ones that use high voltage prog= ramming, such as the PIC16C71, and you only get one open drain pin on those= .. Not to say that you won't get away with it on certain part numbers, but a l= ot of the CMOS processes start breaking down above seven or eight volts. No= t to mention there might be diodes to V+ built in, although those should be= described in the datasheet if so equipped. I think the odds of it working on an 18F47K40 are pretty slim. Friendly regards, Bob ________________________________________ From: piclist-bounces@mit.edu on behalf of James = Burkart=20 Sent: Monday, August 26, 2019 11:08 AM To: Microcontroller discussion list - Public. Subject: [PIC] OD output on 18F47K40 controlling P-FET at 12.6V I can't find in the datasheet what the maximum voltage allowed on a pin configured as output with open drain. I'd like to switch a P-FET configured as a high-side using an OD output on the PIC, where the gate is pulled up to 12.6V. Is this OK to do? Currently I'm using a 2n2222 to pull the gate low, but if I could nix it and control the gate directly that would be great! -- Sincerely, James Burkart --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .