You can see Cparasitic is on the same input line as C(ADC). If you have parasitic capacitance on the input, it will add to the capacitance of C(ADC) and affect the internal timing circuit of the sample and hold feature of the ADC. So to answer your question, yes it will affect the internal operation. Ryan On Wed, 22 Aug 2018 at 08:09, Jason White wrote: > A footnote (note 2 in attached image) in the STM32F207 datasheet (page 12= 7) > states that a high capacitance at the ADC input pin can reduce conversion > accuracy. How exactly should this be interpreted? > > Sure, having a R-C lowpass at the ADC input pin will reduce bandwidth. Bu= t > will the capacitance affect the internal operation of the ADC? > > -- > Jason White > -- > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .