On Sun, 2018-07-29 at 17:45 -0700, Harold Hallikainen wrote:
> Great writeup!I think FIFO communications between the two cores would be
> interesting.

Thanks.

So I went and tried out the FIFO and if anything it is even easier than
the mailbox.  I added a couple of code snippets to the blog, but
basically, there is a receive and send enable bit to set, and then it is
simply a matter of reading or writing to the FIFO register.

Of course there are overflow, empty, etc. status bits.

--McD


>  I do a lot of FIFO communications between tasks in a PIC32.
>=20
> Thanks!
>=20
> Harold
>=20
> > On Fri, 2018-06-22 at 13:28 +0000, AB Pearce - UKRI STFC wrote:
> >> For those who have not been following the noise on the Microchip Forum=
s,
> >> the initial model of dual core dsPICs is out.
> >>
> >> https://www.microchip.com/forums/m1026362.aspx
> >>
> >
> > OK, so I had to get some to play with. My discoveries so far:
> >
> > https://elmer166.blogspot.com/2018/07/dspic33ch128mp505.html
> >
> > --McD
> >
> >
> > --
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> > View/change your membership options at
> > http://mailman.mit.edu/mailman/listinfo/piclist
> >
>=20
>=20
> --=20
> FCC Rules Updated Daily at http://www.hallikainen.com
> Not sent from an iPhone.


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