Great writeup!I think FIFO communications between the two cores would be interesting. I do a lot of FIFO communications between tasks in a PIC32. Thanks! Harold > On Fri, 2018-06-22 at 13:28 +0000, AB Pearce - UKRI STFC wrote: >> For those who have not been following the noise on the Microchip Forums, >> the initial model of dual core dsPICs is out. >> >> https://www.microchip.com/forums/m1026362.aspx >> > > OK, so I had to get some to play with. My discoveries so far: > > https://elmer166.blogspot.com/2018/07/dspic33ch128mp505.html > > --McD > > > -- > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > --=20 FCC Rules Updated Daily at http://www.hallikainen.com Not sent from an iPhone. --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .