Hello Andrew,
Are these codes in a same program? My opinion is that silicon errata writes
different solution for the "Special considerations for interrupt context
save" problem on the page 6.
http://ww1.microchip.com/downloads/en/DeviceDoc/80478a.pdf
Regards,
Zsolt
char degCtr;
void main(void)
{
char tmp;
TRISB=3D0;
degCtr=3D0;
while(1)
{
tmp=3D255;
while(tmp) tmp--;
tmp=3D255;
while(tmp) tmp--;
degCtr++;
LATB=3DdegCtr;
}
}
-------------------------------------------------
void HighPriorityISRCode()
{
//A3 silicon errata
_asm pop _endasm
if(PIR1bits.TMR1IF)
{
T1CONbits.TMR1ON=3D0;
WriteTimer1(degTmrCt);
PIR1bits.TMR1IF=3D0;
degCtr++;
degTDC++;
PIR1bits.TMR1IF=3D0;
switch(degCtr)
{
case(28):
case(48):
case(68):
case(88):
LATB &=3D CKP_ON;
break;
case(30):
case(50):
case(70):
case(90):
LATB |=3D CKP_OFF;
break;
case(120):
degCtr=3D0;
cmpCtr--;
if(cmpCtr=3D=3D0)
{
LATB ^=3D CMP_SIG;
cmpCtr=3D3;
}
break;
}
if(degTDC=3D=3D60)
degTDC=3D-60;
-----------------------------------------
2017-12-19 7:52 GMT+01:00 andrew kelley :
> I'm having an issue with an occasional (250ms or so) glitch with timer 1
> using interrupts on a 2550 with USB.
>
> Basically the interrupt increments a counter and creates 4 pulses on one
> output and one pulse every twelve on another.
>
> Only issue is that every so often, either a random pulse is missing or ar=
e
> closer together than should be.
>
> I wouldn't think USB would have anything to do with it, as this is the on=
ly
> interrupt enabled, and a high interrupt at that.
>
> It's mostly correct, except that glitch, ~250 ms spread. Wdt is disabled.
> Communicates the whole time properly over USB, so it's not like the
> processor is locking up. No code modifies the counter outside of the
> interrupt.
>
> I'll post the code/LA traces if needed, just wondering if someone has run
> in to something similar.
>
> Thanks,
> Andrew
> --
> http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive
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>
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