James C., thank you for your 2 replies but your 2nd reply (see quoted excer=
pt below) indicates you misread a register name.  You suggested I write F0h=
 to NVMDATH, but NVMDATH is a "data" register.  The reality is that F0h mus=
t be written to NVMADRH, the address register.  So the question I originall=
y posted about the "data" register NVMDATH:NVMDATL remains...


"If truly only '8-bit' then why is the NVMDATH:NVMDATL register pair (16-bi=
ts) required to WRITE to EEPROM?  In other words, if truly 8-bit, am I allo=
wed to WRITE to only to the Low Byte, NVMDATL?"


Would you say that NVMDATH is ignored on the 16F18854?  Because the datashe=
et is so unclear, such can only be an assumption -- an assumption based on =
the datasheet's "8-bit" wording being correct. Or should I write 0 to NVMDA=
TH just to be safe?  (That too "assumes" that a 0 in that register would av=
oid trouble.)


I opened a case ticket with Microchip last week and they finally replied to=
day (it always takes them a long time to reply).  They said they would conf=
irm my error report and then add changes to the next datasheet revision.  B=
ut who knows when that will be. =20

Programming and then testing and finding one's code seemingly works without=
 problem is all fine and well, but having a clear portion of the MCU's data=
sheet to justify one's code is also important.  That's what frustrates me a=
bout the current Revision B datasheet.

--James Wages



Fri, 4 Aug 2017 14:53:30 +1000, James Cameron <quozl@laptop.org>:

    Because the NVM peripheral accesses more than the EEPROM, and there
    must be a way to disambiguate that access.
   =20
    Because the address decoder described by Table 10-2 NRM ORGANIZATION
    says that access to EEPROM requires an NVMDATH value of F0h.
   =20
    >In other words, if truly 8-bit, am I allowed to WRITE to only to the
    >Low Byte, NVMDATL?
   =20
    Provided you have written F0h to NVMDATH, probably yes.
   =20
    Should any code write a different value to NVMDATH, no.


--=20
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