G'day James,

I've not used either of these chips, CWG, or PPS, but I've looked
briefly at the two datasheets.

Moving from PIC16F1508 to PIC16F18854 adds silicon IP for a peripheral
pin select (PPS) module.  Block diagrams in the '18854 CWG section
refer to signal names in the IP rather than signal names exposed in
registers or at pins.  So my guess is that "Gx1OEx <3:0> bits" are
internal signals; and the datasheet is in error at that point.

On your related question; from the description of the '18854 PPS
section, especially figure 13-1 simplified PPS block diagram, and
section 13.3 on bidirectional pins, it doesn't seem likely to me that
your hitching of outputs will affect the inputs.  Consider them
default-assigned, along with the other inputs also default-assigned to
RB0 and RB1.

So if you don't want to use the CWGxIN signals, make sure you have not
selected them in the CWGxISM register.  (per table 20-2).

--=20
James Cameron
http://quozl.netrek.org/
--=20
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