I've successfully programmed the CWG on a PIC16F1508 in Assembly in the pas=
t.  I am now attempting to do the same on the PIC16F18854 chip, but there a=
ppears to be a datasheet error that is obscuring my path forward.  Please r=
efer to "20.12 Configuring the CWG" on page 266 if the PIC16(L)F18854 datas=
heet (Rev.B):

http://ww1.microchip.com/downloads/en/DeviceDoc/40001826B.pdf

Specifically note the following 3 steps extracted from Section 20.12, which=
 are to be performed in sequence:

7. Configure the following controls.=20

    c. Set the output enables for the desired outputs.=20
=20
8. Set the EN bit.
=20
9. Clear TRIS control bits corresponding to the desired output pins to conf=
igure these pins as outputs.


The "output enables" mentioned in 7c above is the main issue.  You can see =
an "Output Enables" section 20.4.1 in the datasheet, which makes reference =
to "Gx1OEx <3:0> bits.  That reference appears to be a datasheet error inso=
far as "Gx1OEx" does not appear under any register in that entire datasheet=
, nor can I find anything close to resembling "Gx1OEx" in the p16f18854.inc=
 file.

That apparent datasheet error, in addition to the fact that many registers =
used on the 16F18854 are different from the 16F1508, means I cannot simply =
copy/paste my 16F1508 ASM code into my 16F18854 code.

Simply put, I'm trying to figure out the correct ASM code for CWG setup seq=
uence on the 16F8854.

For sake of comparing the CWG Setup between the two PICs I've mentioned, St=
ep-6 in Section 26.11 on page 285 of the 16F1508 datasheet makes it clear t=
hat register CWGxCON0 is to be used on the 16F1508.  But CWGxCON0 cannot be=
 used for that same purpose on the 16F18854.  Even so, the basic concept SH=
OULD be the same; meaning, we need to ensure CWG1A, CWG1B, etc. are mapped =
as Outputs.  The 16F1508 does not have PPS mapping so it was easier for me =
to figure out the CWG setup sequence in ASM on that PIC.  I'm new to PPS ma=
pping with the 16F18854, but the 16F18854 datasheet indicates the following=
 on the subject:
=20
PPS Outputs are defined by RxyPPS, where Rxy =3D R + Port + bit
(So PortA, bit0 =3D RA0PPS)
=20
The 16F18854 datasheet also defines this:
RxyPPS value for CWG1A =3D 0x05
RxyPPS value for CWG1B =3D 0x06

So in theory, the ASM code I've written in the following GIST should assign=
 CWG1A as an Output on RB0 and CWG1B as an Output on RB1, contingent on my =
TRISB settings:

https://gist.github.com/JDW1/387838530f298e71f3c7182ff1c48930

Does my code look correct?
=20

I now have a related question.  Will my code unhitch the CWG1IN & CWG2IN "i=
nputs" which are default-assigned to RB0 and RB1 respectively? (My aim is t=
o make the NCO output the CWG input, so external CWG inputs are not needed =
in my application.)

I would appreciate hearing your thoughts.

Thank you,

James Wages




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