On 24 Mar 2017 at 17:36, James Wages wrote: > 2016/10/22 1:00 AM, "Brent Brown" : >=20 > Ball park figures I generally start with for external pull-ups: > - 47k or 100k for short traces on a PCB when consumption matters > - 10k anywhere on a PCB when consumption doesn't matter >=20 > I've been giving the topic of "pull-up resistance" and "pin input > impedance" more thought lately. Would it not be best to use the > datasheet values to calculate LOW and HIGH noise margin (for TTL), > and then calculate the resistance with that?=20 > > For example, consider the 16F1508 datasheet, page 319: >=20 > http://ww1.microchip.com/downloads/en/DeviceDoc/40001609E.pdf >=20 > Let's say we are running the chip at Vdd=3D3.0V and using TTL I/O > pins. According to the datasheet:=20 >=20 > * Input LO Voltage =3D 0.15 x Vdd =3D 0.15 x 3.0 =3D 0.45V > (Voltage must be 0.45V or lower to register as a LO.) Seems ok > * Input HI Voltage =3D 0.25 x Vdd + 0.8 =3D 0.25 x 3.0 + 0.8 =3D 1.55V > (Voltage must be 1.55V or higher to register as a HI.) Ditto > * Output LO Voltage =3D 0.6V > * Output HI Voltage =3D Vdd - 0.7 =3D 3.0 - 0.7 =3D 2.3V I didn't check the datasheet so I'll assume the figure are as stated, but I= 'll pause=20 here to contemplate what these output LO and HI voltages mean. These are th= e=20 voltages you'll see if the output is pushing/pulling at it's rated (or othe= rwise=20 specified) current. Output low will ideally be 0V, and indeed at very low c= urrents it=20 will be close to that, but having a finite impedance the devices output pin= will be=20 raised in accordance with the current it is sinking. Likewise, an output hi= gh will=20 ideally be Vdd but current and impedance create a voltage drop. I don't see yet why you're concerning yourself with output voltages when tr= ying to=20 establish a pull up resistor for an input, but that's ok, let's continue fo= r now... > * Input Leakage Current @85=B0C =3D 125nA max > * Input Leakage Current @125=B0C =3D 1000nA max Yes, interesting. With internal pull up resistors disabled, input current i= s very low,=20 meaning input impedance is very high. But actual input current is mostly le= akage,=20 varying mostly with temperature, and is not easily modelled by just a resis= tance=20 (though you can do so for worst case analysis). > Normally "Noise Immunity/Margin" would be calculated as: >=20 > LO =3D Input LO Voltage - Output HI Voltage Possibly a little mixed up, though I think you get the figures right anyway= .. How=20 about LO =3D Input LO Voltage - Output LO Voltage. =20 > HI =3D Input HI Voltage - Output HI Voltage > > As per this: > https://www.allaboutcircuits.com/textbook/digital/chpt-3/logic-signal-vol= tage-levels/ Sure, for a digital output driving a digital input, one logic gate driving = one or more=20 others. But if we're talking about a pull up resistor we're likely not inte= rfacing a logic=20 gate to the PIC input. More likely a switch or something similar. =20 > But in the case of the PIC16F1508, those calculations would result in neg= ative=20 values: >=20 > LO margin =3D 0.45V - 0.6V =3D -0.15V > > HI margin =3D 1.55V - 2.3V =3D -0.75V The negative means it is unacceptable. Eg. applying 0.6V to an input with a= LO max=20 of 0.45V will not guarantee that a LO level is read. But, the output HI and LO figures you are using are for a fully loaded PIC = output...=20 the voltages are stretched beyond what would be acceptable as logic level i= nputs to=20 another device. They are still within acceptable limits for use of the outp= ut pins. For=20 an example, a PIC output HI driving an LED (sometimes even without a resist= or) will=20 pull the output voltage down horrendously, but will typically still be with= in the allowed=20 output high current spec for the PIC. > I assume we would not take the ABS (absolute value) here. But if not, wh= at is the=20 noise margin? > To quantify noise margin you need to establish exactly what the source and = load=20 are. > In some PIC discussions I've seen at least one person suggest that the lo= w-level=20 > TTL noise margin is 0.4V,: http://electronics.stackexchange.com/questions/124620/maximum-resistance-th= at-c an-be-put-in-series-with-an-input-to-a-pic-microcontr >=20 > But I think that 0.4V value is based on a Vdd of 5.0v and is used a gener= al rule of=20 thumb more than something specifically tied to a particular datasheet. But= let's do a=20 calculation based on that assumption for now. With the LO-level noise immu= nity=20 assumed to be 0.4V, knowing the Leakage Current is 125nA max (at 85=B0C), O= hm's=20 law gives us the Resistance value: >=20 > R =3D V/I =3D (0.45V-0.4V) / 125E-9 =3D 400k (seems reasonable) Agreed, not a silly number, but the assumptions taken to get there don't gi= ve a lot of=20 validity. > But even if we assume the 0.4V noise margin to be correct, using the "0.4= 5V Input=20 > LO Voltage" in that calculation would mean the resistance would be for us= e as a > pull-down, correct? If so, to calculate the pull-up resistance, we would= need to > use the Output HI Voltage in combination with some HI-level Noise Margin = (say > 0.7V): =20 Getting confused now. Don't see how a pull-up resistor connected to Vdd and= an=20 input pin can be related to the output HI and LO voltages of an output pin. =20 > R =3D V/I =3D (2.3-0.7V) / 125E-9 =3D 12.8M (too large to be correct) >=20 > Obviously, there are flaws in my calculations, so I am posting this here = to see if > any of you can correct my assumptions. If we only use the Input "LO" Vol= tage in > the calculation, WHY do we use it? Here's my take on it. We have a PIC input, it connects through a wire to a = switch to=20 0V (same 0V as the PIC uses, =3D Vss). We want the PIC to read the input as= HI or '1'=20 when the switch is open, and LO or '0' when the switch is closed. Using you= r figures=20 from earlier we'll take it that the PIC supply (Vdd) is 3V and the PIC has = input LO=20 max of 0.45V and input HI max of 1.55V. We have the internal pull-up resistor disabled, and wish to calculate a sui= table value=20 for a pull-up resistor, from input pin to Vdd. Let's take worst case PIC input current of the stated 1000nA @ 125deg C=3D = 1uA.=20 The switch draws nothing when it is open, the pull-up resistor must ensure = the PIC=20 pin pulls up to at least 1.55V (allowing no margin). Voltage accross resist= or is 3 -=20 1.55 =3D 1.45V. Resistance =3D 1.45V / 1uA =3D 1.45M Ohms. When switch in o= n PIC=20 input voltage is 0V (it's a really good switch and doesn't flinch at the 3V= /1.45M=20 Ohms =3D 2.07uA, oh wait... minus the 1uA the PIC takes =3D 1.07uA). But you want some input HI margin. How much? That depends. There is no form= ula=20 that says how much you need. We've already used a worst case scenario input current, in normal opeation = it will be=20 very much lower and you will get some margin from that. We can reduce the resistance to increase the voltage the PIC input pulls up= to. A=20 small value resistor is the same price as a high value one, so no problems = there. One limiting factor is how much current you can afford when the switch is c= losed, or=20 how much current is reasonable or necesasry - which will depend on construc= tion=20 and expected operating environment. The switch may be far away on external= =20 wiring, or may be used in an electrically noisy environment, or in a very h= umid=20 environment, or not, or... and so rules of thumb and experience and industr= y=20 practice abound. I'm not sure that I've explained in a way that helps your understanding, bu= t I hope=20 so~! --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .