Thanks BrentJim
>> 3 using Desat ie. monitor the voltage across VDS ( but RDS seems to be
>> dependent on a few factors )
> Option 3 appeals to me. Low parts count, low cost, no added voltage drop/=
power
> dissipation, hard to beat. Yes RDS varies, but I'd be surprised if you ca=
n't meet your
> spec of approx 150-200% overload detect. Calibrate at a known
> current/temperature if necessary.
>
>> I think I'm leaning towards a sense resistor with a comparator
>> circuit that would drive a transistor on the gate to pull it to
>> ground
> Comparator would prefferably drive an (interrupt) input to the micro. Ass=
ume there
> is already a micro there doing MOSFET PWM control etc?. Micro could keep
> MOSFET off for a time to let it cool down, retry at sufficient intervals =
such that
> device is not destroyed even if the fault remains indefinitely, reset whe=
n the fault is
> removed. Additionally and ideally, micro would monitor supply voltage and=
 keep the
> MOSFET off when insufficient gate drive is available.
>
> Simpler/cheaper (and rougher) methods without using a comparator would be=
:
>
> 1) Resistor directly from Drain to micro input, interrupt and/or Schmitt =
trigger if
> possible. Vds detect point is logic level high. Instantaneous dissipation=
 say 20A x 3V
> =3D 60W, workable.
Not sure VDS would be high enough to be a logic high before my FET=20
burned up. Maybe with an OpAmp, but then I guess I may as well use a=20
comparator.
>
> 2) Resistor from Drain to base of an NPN transistor, emitter to ground, c=
ollector to
> micro input with pullup resistor if required. Vds detect point is Vbe, ap=
prox 0.6V.
> Instantaneous dissipation 20A x 0.6V =3D 12W.
Hmm this is an interesting configuration.  Would I need to use a FET=20
with an RDS of .6/20 =3D 30 millohm or more in order that this work=20
however? I was planning on using a FET with an even lower RDS to keep=20
dissipation down.

Thanks Again
Jim
>

--=20
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