> CONFIG CP0 =3D OFF > CONFIG CP1 =3D OFF > CONFIG WRT0 =3D OFF > CONFIG WRT1 =3D OFF what about EBTR1 EBTR0 ? Cheers Tony On Tue, Oct 11, 2016 at 10:36 AM, IVP wrote: >> The chip internal programming must work because it programs properly. > > That hasn't gone unthought about ;-) > > Although /mclr is pulled up to ~13V during programming > >> Have you tried writing a new and simple program that just writes 8 >> bytes to 0x1840 and then read the chip back in a programmer? > > Ignoring the outer '8-byte' loop ? Yes > >> Any floating input pins? - they can cause weird things to happen - >> "for some reason it came right twice" :-) > > All pins except /mclr are o/p, which has 10k/100n. There's about > 30mV noise below Vcc on the pin during the self-write > > Joe > > > ----- > No virus found in this message. > Checked by AVG - www.avg.com > Version: 2016.0.7797 / Virus Database: 4656/13185 - Release Date: 10/10/1= 6 > > -- > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .