Sorry, been having too much fun to talk.  ;-)

Here's my brain dump for this morning.  On reply, please change topic
tag!

Experimenting with rapid prototyping, to reduce or remove the edit
compile reflash test cycle.  Using, in essence, telnet and ftp over
encrypted WiFi to ESP8266.  Use telnet with a log to write code on the
target, in circuit.  Use an editor on the host to capture the usable
parts.  Drag and drop.  Use ftp to send debugged and tested code to
the target SPI Flash for loading on restart.

I'd eventually like to integrate the whole into emacs, with a target
console window, and using emacs built-in FTP support.  For fun.

Some way to go.  But so far ... at 160 MHz overclocked, I'm able to
toggle GPIO pins at 18 microseconds per Forth DO-LOOP.  If my
calculations are correct that's 55 kHz.  Higher rates would need C and
reflashing.

Test code (use monospaced font);

\ abbreviation for the pin number
3 constant gpio0

\ enable as output without pull-up
nopull gpio-output gpio0 gpio-mode

\ measure the time taken for ten thousand loops of toggling pin
: x
   get-ticks            ( us )          \ get clock time at start
   #10000 0 do
     1 gpio0 gpio-pin!                  \ raise pin output
     0 gpio0 gpio-pin!                  \ lower pin output
  loop                  ( us )
  get-ticks             ( us new-us )   \ get clock time at end
  swap - .d             ( )             \ subtract and print
;

Running it a few times;

180950 180881 180881 180882 180881 180881 180881 180882 180887 180888
180882 180881 180881 180882

Observed;

- first run usually largest, probably due to the code running in IROM
  space which is cached SPI Flash, so required pages have to be
  paged in, (have previously scoped SPI Flash to verify),

- some variance due to concurrent wireless interrupt load.

--=20
James Cameron
http://quozl.netrek.org/
--=20
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